adv601 Analog Devices, Inc., adv601 Datasheet - Page 22

• Manufacturer Part Number: adv601
• Description: Low Cost Multiformat Video Codec
• Manufacturer: Analog Devices, Inc.

Name
CCIR-656
Multiplex Philips
Philips
Gray Scale
ADV601
• Active Area Control
• Video Format
VDATA[19:0] Pins
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
NOTE
1
Italic font for an entry in this table indicates that the use of the pin is optional (i.e., bits per component greater than 8 ). Note that unused optional pins should be tied
through a resistor to ground. Also, N/C for an entry in this table indicates that the pin is never used for a particular video format. This nomenclature is consistent
with the Video Format Descriptions found later in this section. Note that Data0 is always the LSB for all formats.
Four registers HSTART (horizontal start), HEND (horizon-
tal end), VSTART (vertical start) and VEND (vertical end)
determine the active video area. The maximum active video
area is 768 by 288 pixels for a single field.
This control determines the video format that is supported. In
general, the goal of the various video formats is to support
glueless interfaces to the wide variety of video formats periph-
eral components expect. This control is maintained by the
host processor. Table VII shows a synopsis of the supported
video formats. Definitions of each format can be found later
in this section. For Video Interface pins descriptions, see the
Pin Function Descriptions.
Table VIII. VDATA[0:19] Pin Functions Under CCIR-656, Multiplex Philips, Philips, and Gray Scale Video Interfaces
Bit/
Component
8 or 10
8 or 10
8 or 10
8, 10 or 12
CCIR-656
N/C
N/C
N/C
N/C
N/C
N/C
N/C
N/C
N/C
N/C
Data9
Data8
Data7
Data6
Data5
Data4
Data3
Data2
Data1
Data0
Color
Space
YCrCb
YUV
YUV
Luma
Table VII. Component Digital Video Formats
Sampling
4:2:2
4:2:2
4:0:0
4:2:2
Multiplex Philips
N/C
N/C
N/C
N/C
N/C
N/C
N/C
N/C
N/C
N/C
Data9
Data8
Data7
Data6
Data5
Data4
Data3
Data2
Data1
Data0
–22–
Clocks and Strobes
All video data, whether 1 or 2 “lanes” of video are used, are
synchronous to the video clock (VCLK). The rising edge of
VCLK is used to clock all data into the ADV601.
Synchronization and Blanking Pins
Three signals, which can be configured as inputs or outputs, are
used for video frame and field horizontal synchronization and
blanking. These signals are VSYNC, HSYNC, and FIELD.
VDATA Pins Functions With Differing Video Interface Formats
The functionality of the Video Interface pins depends on the
current video format. Table VIII defines how Video data pins
are used for the various formats.
Nominal
Data Rate
(MHz)
27
<=29.5
29.5
13.5
Philips
Chrominance Data9
Chrominance Data8
Chrominance Data7
Chrominance Data6
Chrominance Data5
Chrominance Data4
Chrominance Data3
Chrominance Data2
Chrominance Data1
Chrominance Data0
Luminance Data9
Luminance Data8
Luminance Data7
Luminance Data6
Luminance Data5
Luminance Data4
Luminance Data3
Luminance Data2
Luminance Data1
Luminance Data0
Master/
Slave
Master
Either
Either
Either
I/F Width
8 or 10
8 or 10
8 or 10
8, 10, or 12
Gray Scale
N/C
N/C
N/C
N/C
N/C
N/C
N/C
N/C
Data11
Data10
Data9
Data8
Data7
Data6
Data5
Data4
Data3
Data2
Data1
Data0
Format
0x0
0x2
0x3
0x8
Number
REV. 0
1