adv601 Analog Devices, Inc., adv601 Datasheet - Page 34

• Manufacturer Part Number: adv601
• Description: Low Cost Multiformat Video Codec
• Manufacturer: Analog Devices, Inc.

ADV601
The Bt819A has a horizontal scaling function that is used to
implement the decimation from the 8xFsc rate to the required
number of pixels per scan line (Pdesired). The value that must
be programmed is HSCALE.
• HSCALE = ((910/Pdesired) – 1) 4096 {for NTSC}
• HSCALE = ((1135/Pdesired) – 1) 4096 {for PAL}
Note that the circuit in Figure 17 has not been built or tested.
Figure 17. ADV601 and Bt819A Example Interfacing Block
Diagram
Using the Philips SAA7110 or SAA 7111 Video Decoder
The SAA7110 can only be used with Square Pixel sample rates.
Note that the circuit in Figure 18 has not been built or tested.
The SAA7111 example circuit, which appears in Figure 19, is
used in this configuration on the ADV601 Video Lab demon-
stration board.
Using the Analog Devices ADV7175 Video Encoder
Because the ADV7175 has a CCIR-656 interface, it connects
directly with the ADV601 without “glue” logic. Note that the
ADV7175 can only be used at CCIR-601 sampling rates.
Figure 18. ADV601 and SAA7110 Example Interfacing
Block Diagram
Figure 19. ADV601 and SAA7111 Example Interfacing
Block Diagram
(API MODE B)
XTO & XT1
VDATA (15:0)
SAA7110
SAA7111
8xFSC
Bt819A
DVALID
ACTIVE
XTAL
XTAL
XTAL
XTAL
CLKIN
FIELD
RDEN
Y(0:7),UV(0:7)
Y(0:7),UV(0:7)
CREF
HREF
CREF
ODD
LLC
LLC
VS
VCLK0
VCLKO
(PHILIPS & SLAVE MODE)
VCLK
CREF
VSYNC
HSYNC
FIELD
VDATA (2:9,12:19)
VCLK
CREF
VDATA (2:9,12:19)
(PHILIPS & SLAVE MODE)
(CCIR-656 MODE)
VCLKO
CREF
HSYNC
FIELD
VSYNC
VDATA (9:2,19:12)
ADV601
ADV601
VCLK
VCLK
ADV601
–34–
The ADV7175 example circuit, which appears in Figure 20, is
used in this configuration on the ADV601 Video Lab demon-
stration board.
Using the Raytheon TMC22173 Video Decoder
Raytheon has a whole family of video parts. Any member of the
family can be used. The user must select the part needed based
on the requirements of the application. Because the Raytheon
part does not include the A/Ds, an external A/D is necessary in
this design (or a pair of A/Ds for S video).
The part can be used in CCIR-656 (D1) mode for a zero con-
trol signal interface or can be used with the more traditional
HSYNC, VSYNC and FIELD signals used for a Philips style
interface. Special attention must be paid to the video output
modes in order to get the right data to the right pins (see the
following two diagrams).
Note that the circuits in Figure 21 and Figure 22 have not been
built or tested.
Figure 21. ADV601 and TMC22153 Example Philips-Like
Mode Interface
Figure 20. ADV601 and ADV7175 Example Interfacing
Block Diagram
Figure 22. ADV601 and TMC22153 Example CCIR-656
Mode Interface
(MODE 0 & SLAVE MODE)
TMC22153
XTAL
ADV7175
MODE SET TO:
XTAL
MODE SET TO:
TMC22153
CDEC = 1
YUVT = 0
F422
CDEC = 1
YUVT = 1
F422
Y(0:9),U(0:9)
DVSYNC
DHSYNC
= 1
CLOCK
= X
FID(0)
CLOCK
CLOCK
BLANK
P7–P0
LDV
Y(0:9)
ALSB
VCLK
VCLK
10k
150
(PHILIPS & SLAVE MODE)
VCLK
CREF
VDATA (0:9,10:19)
VCLKOUT
VSYNC
HSYNC
FIELD
(CCIR656 & SLAVE MODE)
VCLKO
VCLK
VDATA (0:9)
VDATA (9:2)
(CCIR-656 MODE)
XTAL
XTAL
ADV601
ADV601
ADV601
VCLK
REV. 0