ucb1300 NXP Semiconductors, ucb1300 Datasheet - Page 40

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ucb1300

Manufacturer Part Number
ucb1300
Description
Advanced Modem/audio Analog Front-end
Manufacturer
NXP Semiconductors
Datasheet

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CODEC DATA TRANSFER FROM THE
The data resulting from the UCB1300 codec ADC (input) paths is transfer to the system controller at the programmed
codec sample rate. However the codec data is synchronized with the SIB frame repetition rate. Figure 34 shows the basic
synchronization principle used inside the UCB1300. Codec data will be present in each SIB frame produced by the
UCB1300; the sample will be repeated in the following SIB frames till a new sample has become available.
The codec samples in the SIBDOUT stream are also accompanied by a audio and telecom data valid bit (bit 30 and
bit 31). These data valid flags are zero if the corresponding codec ADC paths are disabled and during the start up period
of the codec’s, when unreliable samples are generated. By default (after reset), the data valid bits will be continuously
‘1’ when reliable samples are generated.
However when DYN_VFLAG_ENA is set, the data valid bits will be ‘1’ during one of the SIB frames, containing identical
samples (this is the case when a high divisor is programmed). The audio_vflag bit will be high during the last sample in
a series of identical samples, while the telecom_vflag bit is high at the first sample in a series of identical bits. An example
of the timing diagram is shown in Figure 35.
2000 Jun 26
audio codec out
Advanced modem/audio analog front-end
audio_vflag bit
SIBDOUT
SIBSYNC
fsa
DOWN SAMPLE FILTERS
Fig.35 Audio codec data transfer, AUD_DIV[n] = 9, DYN_VFLAG_ENA = 1.
sample N
sample N
Fig.34 synchronization of codec samples in SIBDOUT data stream.
fsa
fst
UCB1300
output
output
latch
latch
sample N
bit21
bit21
sample N+1
sample N+1
DFF
DFF
40
sample N+1
audio data[n]
telec data[n]
bit48
bit0
sample N+2
load
load
SIB INTERFACE
sample N+2
sample N+2
sample N+2
SIBCLK
SIBDOUT
SIBSYNC
Product specification
sample N+3
UCB1300
sample N+3

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