isp1181 NXP Semiconductors, isp1181 Datasheet - Page 33

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isp1181

Manufacturer Part Number
isp1181
Description
Isp1181 Full-speed Universal Serial Bus Interface Device
Manufacturer
NXP Semiconductors
Datasheet

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Philips Semiconductors
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Product data
12.1.8 Reset Device
12.2.1 Write/Read Endpoint Buffer
12.2 Data flow commands
This command resets the ISP1181 in the same way as an external hardware reset via
input RESET. All registers are initialized to their ‘reset’ values.
Code (Hex): F6 — reset the device
Transaction — none
Data flow commands are used to manage the data transmission between the USB
endpoints and the system microcontroller. Much of the data flow is initiated via an
interrupt to the microcontroller. The data flow commands are used to access the
endpoints and determine whether the endpoint FIFOs contain valid data.
Remark: The IN buffer of an endpoint contains input data for the host, the OUT buffer
receives output data from the host.
This command is used to access endpoint FIFO buffers for reading or writing. First,
the buffer pointer is reset to the beginning of the buffer. Following the command, a
maximum of (N
endpoint buffer. For 16-bit access the maximum number of words is (M + 1), with M
given by (N
incremented by 1 (8-bit bus width) or by 2 (16-bit bus width).
In DMA access the first 2 bytes or the first word (the packet length) are skipped:
transfers start at the third byte or the second word of the endpoint buffer. When
reading, the ISP1181 can detect the last byte/word via the EOP condition. When
writing to a bulk/interrupt endpoint, the endpoint buffer must be completely filled
before sending the data to the host. Exception: when a DMA transfer is stopped by an
external EOT condition, the current buffer content (full or not) is sent to the host.
Remark: Reading data after a Write Endpoint Buffer command or writing data after a
Read Endpoint Buffer command data will cause unpredictable behavior of ISP1181.
Code (Hex): 01 to 0F — write (control IN, endpoint 1 to 14)
Code (Hex): 10, 12 to 1F — read (control OUT, endpoint 1 to 14)
Transaction — write/read maximum N
bulk/interrupt endpoint: N
The data in the endpoint FIFO must be organized as shown in
endpoint FIFO access are given in
Table 29:
Byte #
(8-bit bus)
0
1
2
Endpoint FIFO organization
1) DIV 2. After each read/write action the buffer pointer is automatically
Word #
(16-bit bus)
0 (lower byte)
0 (upper byte)
1 (lower byte)
Rev. 04 — 30 October 2001
2) bytes can be written or read, N representing the size of the
32)
Table 30
Description
packet length (lower byte)
packet length (upper byte)
data byte 1
2 bytes (isochronous endpoint: N
(8-bit bus) and
© Koninklijke Philips Electronics N.V. 2001. All rights reserved.
Full-speed USB interface
Table 31
Table
ISP1181
29. Examples of
(16-bit bus).
1023,
33 of 71

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