isp1504c NXP Semiconductors, isp1504c Datasheet - Page 30

• Manufacturer Part Number: isp1504c
• Description: Ulpi Hi-speed Universal Serial Bus On-the-go Transceiver
• Manufacturer: NXP Semiconductors

NXP Semiconductors
ISP1504A_ISP1504C_1
Product data sheet
9.5.2.3 RxEvent encoding
9.6 Register read and write operations
OTG devices: When an OTG device is configured as an OTG A-device, it must be able to
provide a minimum of 8 mA on V
there is no need for an overcurrent detection circuit because the internal A_VBUS_VLD
comparator is sufficient. If the OTG A-device provides more than 100 mA on V
overcurrent detector must be used and "Standard USB Host Controllers" applies. The
OTG A-device also uses SESS_VLD to detect when an OTG A-device is initiating V
pulsing SRP.
When an OTG device is configured as an OTG B-device, SESS_VLD must be used to
detect when V
when V
pulsing SRP.
The RxEvent field of the RXCMD informs the link of information related packets received
on the USB bus. RxActive and RxError are defined in USB 2.0 Transceiver Macrocell
Interface (UTMI) Specification Ver. 1.05 . HostDisconnect is defined in UTMI+
Specification Rev. 1.0 . A short definition is also given in the following subsections.
RxActive:
RxActive event to the link. An RxActive event can be communicated using two methods.
The first method is for the ISP1504 to simultaneously assert DIR and NXT. The second
method is for the ISP1504 to send an RXCMD to the link with the RxActive field in
RxEvent bits set to logic 1. The link must be able to detect both methods. RxActive frames
the receive packet from the first byte to the last byte.
The link must assume that RxActive is set to logic 0 when indicated in an RXCMD or when
DIR is de-asserted, whichever occurs first.
The link uses RxActive to time high-speed packets and ensure that bus turnaround times
are met. For more information on the USB packet timing, see
RxError:
de-asserts NXT and sends an RXCMD with the RxError field set to logic 1. The received
packet is no longer valid and must be dropped by the link.
HostDisconnect:
HostDisconnect is valid only when the ISP1504 is configured as a host (both
DP_PULLDOWN and DM_PULLDOWN are set to logic 1), and indicates to the Host
Controller when a peripheral is connected or disconnected. The Host Controller must
enable HostDisconnect by setting the HOST_DISCON_R and HOST_DISCON_F bits in
the USB Interrupt Enable Rising Edge and USB Interrupt Enable Falling Edge registers,
respectively. Changes in HostDisconnect will cause the PHY to send an RXCMD to the
link with the updated value.
Figure 12
addressing and extended addressing register operations. Extended register addressing is
optional for links. Note that register operations will be aborted if the ISP1504 unexpectedly
asserts DIR during the operation. When a register operation is aborted, the link must retry
until successful. For more information on register operations, refer to UTMI+ Low Pin
Interface (ULPI) Specification Rev. 1.1 .
BUS
When the ISP1504 has detected an error while receiving a USB packet, it
shows register read and write sequences. The ISP1504 supports immediate
When the ISP1504 has detected a SYNC pattern on the USB bus, it signals an
has dropped to a LOW level, allowing the B-device to safely initiate V
BUS
is at a sufficient level for operation. SESS_END must be used to detect
HostDisconnect is encoded into the RxEvent field of the RXCMD.
Rev. 01 — 19 October 2006
BUS
. If the OTG A-device provides less than 100 mA, then
ISP1504A; ISP1504C
ULPI HS USB OTG transceiver
Section
9.8.1.
© NXP B.V. 2006. All rights reserved.
BUS
BUS
, an
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