isp1504c NXP Semiconductors, isp1504c Datasheet - Page 82

• Manufacturer Part Number: isp1504c
• Description: Ulpi Hi-speed Universal Serial Bus On-the-go Transceiver
• Manufacturer: NXP Semiconductors

NXP Semiconductors
25. Figures
Fig 1.
Fig 2.
Fig 3.
Fig 4.
Fig 5.
Fig 6.
Fig 7.
Fig 8.
Fig 9.
Fig 10. Single and back-to-back RXCMDs from the
Fig 11. RXCMD A_VBUS_VLD indicator source . . . . . . .29
Fig 12. Example of register write, register read, extended
Fig 13. USB reset and high-speed detection handshake
Fig 14. Example of using the ISP1504 to transmit and
Fig 15. High-speed transmit-to-transmit packet timing. . .35
Fig 16. High-speed receive-to-transmit packet timing . . .36
Fig 17. Preamble sequence . . . . . . . . . . . . . . . . . . . . . . .37
Fig 18. Full-speed suspend and resume . . . . . . . . . . . . .38
Fig 19. High-speed suspend and resume . . . . . . . . . . . .40
Fig 20. Remote wake-up from low-power mode . . . . . . .42
Fig 21. Transmitting USB packets without automatic SYNC
Fig 22. Example of transmit followed by receive in 6-pin
Fig 23. Example of transmit followed by receive in 3-pin
Fig 24. Human body ESD test model. . . . . . . . . . . . . . . .56
Fig 25. Charge pump supply current vs. V
Fig 26. V
Fig 27. V
Fig 28. Charge pump supply current vs. temperature . . .63
Fig 29. Rise time and fall time . . . . . . . . . . . . . . . . . . . . .68
Fig 30. Timing of TX_DAT and TX_SE0 to DP and DM . .68
Fig 31. Timing of TX_ENABLE to DP and DM. . . . . . . . .68
Fig 32. Timing of DP and DM to RX_RCV, RX_DP and
Fig 33. ULPI timing interface . . . . . . . . . . . . . . . . . . . . . .68
Fig 34. Using the ISP1504 with an OTG Controller; internal
Fig 35. Using the ISP1504 with an OTG Controller; external
ISP1504A_ISP1504C_1
Product data sheet
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . .4
Pin configuration HVQFN32; top view . . . . . . . . . .5
External capacitors connection . . . . . . . . . . . . . .10
Charge pump capacitor . . . . . . . . . . . . . . . . . . . .12
Internal power-on reset timing . . . . . . . . . . . . . . .20
Power-up and reset sequence required before the
ULPI bus is ready for use. . . . . . . . . . . . . . . . . . .22
Interface behavior with respect to RESET_N. . . .23
Entering and exiting 3-state in normal mode . . . .24
Entering and exiting 3-state in suspend mode. . .25
ISP1504 to the link. . . . . . . . . . . . . . . . . . . . . . . .27
register write and extended register read . . . . . .31
(chirp) sequence . . . . . . . . . . . . . . . . . . . . . . . . .33
receive USB data . . . . . . . . . . . . . . . . . . . . . . . . .34
and EOP generation . . . . . . . . . . . . . . . . . . . . . .43
serial mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . .45
serial mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . .45
current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .63
voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .63
RX_DM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .68
charge pump is utilized and crystal is attached . .70
charge pump using the ISP1504 internal V
BUS
BUS
output voltage vs. V
output voltage vs. charge pump supply
BUS
output current . . . .63
BUS
output
Rev. 01 — 19 October 2006
BUS
valid
Fig 36. Using the ISP1504 with a standard USB Host
Fig 37. Using the ISP1504 with a standard USB Peripheral
Fig 38. Package outline SOT617-1 (HVQFN32) . . . . . . . 74
Fig 39. Temperature profiles for large and small
and external 60 MHz input on CLOCK . . . . . . . . 71
Controller; external 5 V source with built-in FAULT
and external square wave input on XTAL1 . . . . . 72
Controller; external crystal . . . . . . . . . . . . . . . . . 73
components. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77
ISP1504A; ISP1504C
ULPI HS USB OTG transceiver
© NXP B.V. 2006. All rights reserved.
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