mc33192dw Freescale Semiconductor, Inc, mc33192dw Datasheet - Page 8

• Manufacturer Part Number: mc33192dw
• Description: Mi-bus Interface Stepper Motor Controller
• Manufacturer: Freescale Semiconductor, Inc

Bi–Phase Coding and Detection
requires two time slots (2t s ) to encode a single data bit. This
allows detection of a single error at the time slot level. The
logic levels “1” or “0” are determined by the organization of
the two time slots. These always have complementary logic
levels of either zero volts or plus five volts, which are
detected using an Exclusive OR detection circuit during the
Push Field sequence. A “1” bit is detected when the first time
slot is set to a zero logic state (0 V) followed by the second
time slot set to a logic state one (5.0 V). Conversely, a “0” bit
is detected when the first time slot is set to the logic state
“one” (5.0 V) followed by a second time slot set to a “zero”
logic state (0 V). For these two bits are Exclusive–ORs of
each other.
the Bi–Phase code. Bi–Phase detection involves the
sampling of the Push Field Bi–Phase code twice (a and b) for
each time slot. A code error occurs when the two time slots of
the Bi–Phase do not follow a logical Exclusive–OR function
(see Figure 10).
Field Bi–Phase code twice (a and a’) and (b and b’) during
each time slot. A noise error is detected if the two sample
values do not have the same logical level.
Field, in which data and addresses are transferred by the
MCU to the slave device; and the Pull Field, in which serial
data is transferred back to the MCU from the address
selected slave device. The message frame is broken down
into seven individual field segments as indicated in Figure 4
(Start, Push Field Sync, Push Field Data, Push Field
A d d r e s s , P u l l F i e l d S y n c , P u l l F i e l d D a t a , a n d
End–of–Frame). The following lists the bit size and function
of each of these segments:
slots (3t s ) having the dominant Logic “0” state of less than
0.3 V. Holding the MI–Bus at ground for three time slots (3t s )
marks the beginning of the message frame by violating the
law of the Manchester Code.
Coded Bits
Push Field
8
The Manchester Bi–Phase code shown in Figure 10
The addressed devices receiving the Push Field detect
Noise monitoring is accomplished by sampling the Push
Bi–Phase
Each message frame consists of two fields: The Push
1) Start is the start of message and consists of three time
5.0 V
Figure 10. Noise/Bi–Phase Detection
0 1 2 3 4 5 6 7
a’
(Logic “0”)
a
a
t s
b’
b
b
2 t s
0
1 2 3 4 5 6 7 0
a’
(Logic “1”)
a
a
t s
b’
b
b
Bi–Phase
Detection
Noise
Detection
MESSAGE CODING
MC33192
t
timing for the Push Field Data to follow.
fields (D0, D1, D2, D3 and D4) which comprise the instruction
set defining the configuration and condition of the two
H–Bridge output stages.
bit fields (A0, A1 and A2) which define the address or name
of a MC33192 on the MI–Bus.
of the Push Field and the initial start timing for the Pull Field
Data to follow.
(S2, S1 and S0) which contain the existing status information
of an addressed MC33192.
to the MCU that the status information sent by the MC33192
is complete.
Address bits, Pull Field Sync bit are all coded by the
Manchester Bi–Phase L Code. The Pull Field Data bits are
Non–Return to Zero (NRZ) coded. The End–of Frame field is
a square wave signal with a frequency of 20 kHz or higher so
as to avoid a condition which causes a bus violation.
(2t s ) to encode a single bit. This allows a single error to be
detected during the time slot.
instructions. Refer to Figure10.
This places the MC33192 in the programming mode.
Programming is possible only when the MI–Bus is at 12 V.
Field Data bit positions (D0, D1, D2, D3 and D4) followed by
the designated address value in the Push Field Address
positions (A0, A1, & A2).
instruction. The total of the Pull time, Delay time, and Bus
Violation time (V) of the second instruction (150 s, 275 s
and 75 s respectively) will cause the memory cell to be
energized for 500 s. During the first 150 s of this time, the
MCU is checking the Pull Field Data Bits S2, S1 and S0
looking for the programming code “110” to indicate
complete activation of the memory cell.
previously sent in the First Instruction; entering all “Logic
Zeros” in the Push Field Data positions followed by the
designated Push Field Address value in the address
positions.
time while checking the Pull Field Data bits looking for the
programming code “110” code. The MCU must repeat the
initial Push Field Address instruction until a “110” code is
received before advancing to the Third Instruction.
Data bit positions followed by the programmed address in the
Push Field Address positions. The MCU then checks the Pull
Field Address status bits looking this time for the
2) Push Field Sync is a single bit which establishes initial
3) Push Field Data is comprised of five serial data bit
4) Push Field Address is comprised of three serial data
5) Pull Field Sync is a single bit which establishes the end
6) Pull Field Data is made up of three serial data bit fields
7) End–of–Frame field is a signal which communicates
The Push Field Sync bit, Push Field Data bits, Push Field
The Manchester Bi–Phase L code requires two time slots
Address Programming involves the use of three
First Instruction Set the MI–Bus continuously at 12 V.
Next, the MCU serially enters ”Logic Zeros” in all five Push
The MCU now waits 275 s before starting the second
Second Instruction (MI–Bus voltage remaining at 12 V)
The MCU repeats the same Push Field instruction as
Again, the MCU waits for the Pull, Delay, and Bus violation
Third Instruction The MI–Bus voltage is lowered to 5.0 V.
The MCU serially loads “Logic Zeros” in all five Push Field
MOTOROLA ANALOG IC DEVICE DATA