mc33596 Freescale Semiconductor, Inc, mc33596 Datasheet - Page 21

• Manufacturer Part Number: mc33596
• Description: Pll Tuned Uhf Receiver For Data Transfer Applications
• Manufacturer: Freescale Semiconductor, Inc

11.4 Receiver Startup Delay
As shown in
12
In receive mode, Manchester coded data can be processed internally by the data manager. After decoding,
the data are output on the digital interface, in SPI format. This minimizes the load on the MCU.
The data manager, when enabled (DME = 1), has five purposes:
Table 8
13
In receive mode, on/off sequencing can be controlled internally, or managed externally by the MCU
through the input pin STROBE.
If the internal timer is selected (SOE = 1),
Freescale Semiconductor
Receiver
Status
Signal
•
•
•
•
•
RF
ID detection: The received identifier is compared with the identifier stored in the ID register.
Header recognition: The received header is compared with the one stored in the HEADER
register.
Clock recovery: The clock is recovered during reception of the preamble and is computed from
the shortest received pulse. During the reception of the telegram, the recovered clock is constantly
updated to the data rate of the incoming signal.
Output data and recovered clock on digital interface: See
End-of-message detection: An EOM consists of two consecutive NRZ ones or zeroes.
details some MC33596 features versus DME values.
Data Manager
Receiver On/Off Control
Figure
Off
12, a settling time is required when entering the on state.
DME
0
1
On
Table 8.
Digital Interface Use
when CONFB = 1
SPI deselected
Figure 12. Receiver Usable Window
SPI master
the
MC33596 Data Sheet, Rev. 3
MC33596 Features versus DME
ID
Off
ID
Recovered clock
Data Format
Data bytes
Bit stream
ID
No clock
Section 14.1, “Receive
Settling
Time
ID
Detected
Output
ID
SCLK
MOSI
MOSI
—
ID
ID
Mode.”
ID
On
Data Manager
ID
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