mc33696fje/r2 Freescale Semiconductor, Inc, mc33696fje/r2 Datasheet - Page 30

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mc33696fje/r2

Manufacturer Part Number
mc33696fje/r2
Description
Mc33696 Pll Tuned Uhf Transceiver
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Configuration, Command, and Status Registers
SOE (Strobe Oscillator Enable) enables the strobe oscillator.
Figure 21
OLS (Out of Lock Status) indicates the current status of the PLL.
LVDS (Low Voltage Detection Status) indicates that a low voltage event has occurred when LVDE = 1.
This bit is read-only and is cleared after a read access.
ILA[1:0] (Input Level Attenuation) define the RF input level attenuation.
Values in
OLA[1:0] (Output Level Attenuation) define the RF output level attenuation.
AFF[1:0] (Average Filter Frequency) define the average filter cut-off frequency if the AFFC bit is set.
30
Reset Value
Bit Name
0 = disabled
1 = enabled
0 = The PLL is in lock-in range
1 = The PLL is out of lock-in range
0 = No low voltage detected
1 = Low voltage detected
Table 12
describes configuration register 3, CONFIG3.
AFF1
Bit 7
0
assume the LNA gain is not reduced by the AGC.
OLA1
ILA1
0
0
1
1
0
0
1
1
AFF0
Bit 6
0
ILA0
OLA0
0
1
0
1
0
1
0
1
Table 13. RF Output Level Attenuation
Table 12. RF Input Level Attenuation
Bit 5
OLS
Figure 21. CONFIG3 Register
1
MC33696 Data Sheet, Rev. 9
RF Output Level
RF Input Level
Attenuation
LVDS
Bit 4
Attenuation
1
16 dB
30 dB
12 dB
25 dB
0 dB
8 dB
0 dB
6 dB
Bit 3
ILA1
0
Bit 2
ILA0
0
See Parameter
See Parameter
Number
Number
4.20
2.5
2.6
2.7
2.8
4.3
4.4
4.5
OLA1
Bit 1
0
Freescale Semiconductor
OLA0
Bit 0
0
Addr
$02

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