mc33696fje/r2 Freescale Semiconductor, Inc, mc33696fje/r2 Datasheet - Page 41

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mc33696fje/r2

Manufacturer Part Number
mc33696fje/r2
Description
Mc33696 Pll Tuned Uhf Transceiver
Manufacturer
Freescale Semiconductor, Inc
Datasheet
18.3.4 Data Manager Enabled and Strobe Pin Control
Figure 35
In this configuration, the receiver is controlled only externally by the MCU.
State 20: The receiver is in standby/LVD mode. For further information, see
Mode.” A high level applied to STROBE forces the circuit to state 21.
State 21: The circuit is waiting for a valid ID. If an ID, or its complement, is detected, the state machine
advances to state 22; if not, the state machine will remain in state 21, as long as STROBE is high.
State 22: If a header, or its complement, is detected, the state machine advances to state 23. If not, the state
machine will remain in state 22, as long as STROBE is high.
State 23: A header or its complement has been received; data and clock signals are output on the SPI port
until an EOM indicates the end of the data sequence. If the complement of the header has been received,
Freescale Semiconductor
shows the state diagram when the data manager is enabled and the strobe oscillator is disabled.
SPI Master
SPI Deselected
STROBE = 0
STROBE = 0
Figure 35. Receive Mode, DME = 1, SOE = 0
MC33696 Data Sheet, Rev. 9
and STROBE = 0
Header Received
EOM Received
STROBE = 0
STROBE = 1
Waiting for End of Message
ID Detected
Waiting for a Valid Header
Output Data and Clock
Waiting For a Valid ID
Standby/LVD
State 20
State 21
State 22
State 23
On
On
On
Section 18.4, “Standby/LVD
EOM Received
and STROBE = 1
STROBE = 1
Controller
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