mc33696fje/r2 Freescale Semiconductor, Inc, mc33696fje/r2 Datasheet - Page 36

• Manufacturer Part Number: mc33696fje/r2
• Description: Mc33696 Pll Tuned Uhf Transceiver
• Manufacturer: Freescale Semiconductor, Inc

Controller
HDL[1:0] (Header Length) sets the length of the header, as shown on
HD[5:0] (Header) sets the header. The header is Manchester coded. Its LSB corresponds to the register’s
LSB, whatever the specified length.
17.6 RSSI Register
Figure 28
Bits RSSI[7:4] contain the result of the analog-to-digital conversion of the signal measured at the LNA
output.
Bits RSSI[3:0] contain the result of the analog-to-digital conversion of the signal measured at the IF filter
output.
18
This section describes how the MC33696 controller executes sequences of operations, relative to the
selected mode. The controller is a finite state machine, clocked at T
Figure 29
There are four different modes: configuration, transmit, receive, and standby/LVD. Each mode is exclusive
and can be entered in different ways, as follows.
36
Reset Value
Reset Value
Bit Name
Bit Name
•
•
External signal: CONFB for configuration mode,
External signal and configuration bits: CONFB, TRXE, and/or MODE for all other modes,
Controller
describes the RSSI Result register, RSSI.
(note that some branches refer to other diagrams that provide more detailed information).
RSSI7
HDL1
Bit 7
Bit 7
1
0
RSSI6
HDL0
Bit 6
Bit 6
0
0
HDL1
0
0
1
1
Table 23. Header Length Selection
RSSI5
Bit 5
HD5
Bit 5
Figure 27. HEADER Register
0
0
Figure 28. RSSI Register
MC33696 Data Sheet, Rev. 9
HDL0
0
1
0
1
RSSI4
Bit 4
HD4
Bit 4
0
0
RSSI3
Bit 3
HD3
Bit 3
0
0
HD Length
1 bits
2 bits
4 bits
6 bits
digclk
RSSI2
Bit 2
HD2
Bit 2
Table
0
0
. An overview is presented in
23.
RSSI1
HD1
Bit 1
Bit 1
0
0
Freescale Semiconductor
RSSI0
Bit 0
HD0
Bit 0
0
0
Addr
Addr
$0B
$0C