mfrc531 NXP Semiconductors, mfrc531 Datasheet - Page 41

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mfrc531

Manufacturer Part Number
mfrc531
Description
Iso/iec 14443 Reader Ic
Manufacturer
NXP Semiconductors
Datasheet

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NXP Semiconductors
10. MFRC531 registers
MFRC531_34
Product data sheet
PUBLIC
9.14.2 Authentication procedure
10.1.1 Page registers
10.1.2 Dedicated address bus
10.1.3 Multiplexed address bus
10.1 Register addressing modes
The Crypto1 security algorithm enables authentication of MIFARE cards. To obtain valid
authentication, the correct key has to be available in the key buffer of the MFRC531. This
can be ensured as follows:
Three methods can be used to operate the MFRC531:
The commands, configuration bits and flags are accessed using the microprocessor
interface. The MFRC531 can internally address 64 registers using six address lines.
The MFRC531 register set is segmented into eight pages contain eight registers each. A
Page register can always be addressed, irrespective of which page is currently selected.
When using the MFRC531 with the dedicated address bus, the microprocessor defines
three address lines using address pins A0, A1 and A2. This enables addressing within a
page. To switch between registers in different pages a paging mechanism needs to be
used.
Table 34
Table 34.
The microprocessor may define all six address lines at once using the MFRC531 with a
multiplexed address bus. In this case, either the paging mechanism or linear addressing
can be used.
Table 35
Register bit: UsePageSelect
1
1. Load the internal key buffer by using the LoadKeyE2 (see
2. Start the Authent1 command (see
3. Start the Authent2 command (see
or the LoadKey (see
the error flags to obtain the command execution status.
the error flags and bit Crypto1On to obtain the command execution status.
initiating functions and controlling data by executing commands
configuring the functional operation using a set of configuration bits
monitoring the state of the MFRC531 by reading status flags
shows how the register address is assembled.
shows how the register address is assembled.
Dedicated address bus: assembling the register address
Rev. 3.4 — 26 January 2010
Section 11.6.2 on page
056634
Register address
PageSelect2
Section 11.6.3 on page
Section 11.6.4 on page
PageSelect1
88) commands.
Section 11.6.1 on page
89). When finished, check
89). When finished, check
PageSelect0
ISO/IEC 14443 reader IC
MFRC531
© NXP B.V. 2010. All rights reserved.
A2 A1 A0
41 of 116
88)

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