lu82562ex Intel Corporation, lu82562ex Datasheet - Page 3

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lu82562ex

Manufacturer Part Number
lu82562ex
Description
Dual Footprint
Manufacturer
Intel Corporation
Datasheet
Revision History
Revision
0.25
0.75
1.0
1.5
1.6
1.7
1.8
1.9
2.0
2.1
2.2
Revision Date
June 2006
June 2007
Sep 2002
Sep 2003
Nov 2004
Feb 2007
Oct 2002
Jan 2005
Jan 2005
Jan 2008
Jul 2002
Description
Initial publication of preliminary design guide information.
Published revised design guide information:
Published revised design guide information:
Published revised design guide information:
Added crystal start-up information. Information includes:
Changed signal name FL_SO to the correct signal name FLSH_SO.
Added 82562EX applicability.
Added new values for TX and RX terminations (next to LAN silicon). New
values are now 110 Ω for both TX and RX terminations.
Added new starting values for RBIAS100 and RBIAS10. New starting values
are now 649 Ω for RBIAS100 and 619 Ω for RBIAS10.
Updated reference schematics to reflect new Tx and Rx termination values,
new LAN disable circuit, and RBIAS100/RBIAS10 values.
Removed excess capacitors and changed pins F12 and H12 to no connects.
Added a 1K Ω resistor to pin A13 output.
Updated reference schematics to reflect current differential pair termination
resistor values for the 82547GI/EI.
Updated section 4.2.1 “Termination Resistors for Designs Based on 82562EZ/
EX PLC Device” to reflect current resistor and RBIAS values.
Updated section 4.3.1 “Termination Resistors for Designs Based on 8257GI(EI)
Gigabit Ethernet Controller” to reflect current resistor values.
Updated reference schematics for signals EE_MODE and JTAG_TRST#
(changed resistor values from 1 K Ω to 100 Ω).
Updated sections 3.1.3, 3.1.1.8, and Table 5 in section 3.1.1 (changed max
ESR rate from 20 Ω to 10 Ω for the 82547GI/EI).
Updated reference schematics: sheets 4 and 6.
Added Table 6; approved crystals for the 82547GI(EI).
• Added information on EEPROM settings
• Added design checklist
• Revised reference design schematic
• Revised Ball Number to signal mapping Table to conform to changes in
• Added layout checklist
• Updated LAN disable circuit
• Removed EEPROM information due to publication of separate guides
• Added 82547GI coverage
• Removed Confidential status
• Updated schematics, removed redundant caps
• Revised LAN disable circuit
• New crystal parameters
• Crystal selection guidelines
• Crystal validation methods
• Crystal testing methods
• Changed text in the Catalyst EEPROM revision H table note from
• Removed the Design and Layout Checklists. These checklists are now
“Revision H or higher not supported” to “Revision H is not supported”.
separate Microsoft* Excel spreadsheets.
82547EI datasheet rev 0.75
82562EZ(EX)/82547GI(EI) Dual Footprint
iii

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