tda5360uk NXP Semiconductors, tda5360uk Datasheet - Page 20

• Manufacturer Part Number: tda5360uk
• Description: Pre-amplifier For Hard Disk Drive With Mr-read / Inductive Write Heads
• Manufacturer: NXP Semiconductors

Philips Semiconductors
Note 0 : MDS (Multiple Device Selected) detector :
Note 1a : The Write path can be controled by either a voltage or a current input signal.
Note 1b : BFCTL define BFAST functionality :
Note 3 : For differentiator only (GAIN0 = GAIN1 = 1),
Note 4 : In order to increase performance for high data rate, 3 bits are available to tune the write current waveform.
Note 5 : The threshold range of the TAD can be shifted up by 50% by setting TRANGE HIGH.
1998 July 30
Pre-Amplifier for Hard Disk Drive with
MR-Read / Inductive Write Heads
When several preamps are connected in parallel, this function allows the user detection of wrong adressing
withing the preamps.
When SELT is high, the selected preamp pull a precise current on FLT pin. If only one preamp has reacted,
SELF is LOW. If more than one preamp has reacted, the voltage on FLT pin is lower than a reference voltage
and thus SELF is HIGH.
The signal polarity is non inverted from WDP - WDN input to WPx - WNx output
Voltage mode :
Current mode :
the midrange setting ( HFZ3 = 1, HFZ0 = HFZ1 = HFZ2 = 0 ) have a gain of 44dB at 100 Mhz.
i.e. gain (@100 Mhz)= 80 +10 * (HFZ0 + 2*HFZ1 + 4*HFZ2 + 8*HFZ3)
For gain plus differentiator (other GAIN0, GAIN1 programmation)
the midrange setting (HFZ3=1, HFZ0,1,2=0) create a zero at 300 Mhz independent of the gain bits.
HF Zero @ f = 2400 MHz / (HFZ0 +2*HFZ1 + 4*HFZ2 +8*HFZ3)
i.e. gain = 150 + 75 * ( GAIN0 + 2*GAIN1 - 5*GAIN0*GAIN1)
WCP2 : this bit is used to add a capacitive boost during a transition of the write current.
WCP1,WCP0 : these bits are used to increase the internal swing on the write data signal.
when IW4 is HIGH ( Iwr > 30.8 mA), some capacitive compensation is also activated in the write driver.
In that case the steps are still 177uV,
but the range is shifted from ( 0.390mV-5.877mV ) to ( 3.560mV-9.047mV )
The relation between the threshold of the TAD programmed in Reg. 05 and the real threshold is a function of
the input impedance of the reader and the low corner frequency of the reader.
See ENFST bit in Reg. 11 for restrictions of BFAST functionality
BFCTL
HIGH
HIGH
LOW
LOW
WDP-WDN > 0 => WPx-WNx > 0 (current flowing externally from WPx to WNx)
current has to be pulled from WDP and WDN pins.
The positive side for signal, is the one where the least current is pulled
The negative side for signal, is the one where the most current is pulled
most current pulled from WDN => current flowing externally from WPx to WNx)
BFAST
HIGH
HIGH
LOW
LOW
20
Function
I
I
Normal Reader PassBand
Low Frequency corner increased to 8 MHz
MR
MR
generator ON (Reader ON) during write
generator OFF (Reader OFF) during write
Objective Specification, Revision 2.2
TDA5360