aduc7023bcpz62irl Analog Devices, Inc., aduc7023bcpz62irl Datasheet - Page 28
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aduc7023bcpz62irl
Manufacturer Part Number
aduc7023bcpz62irl
Description
Precision Analog Microcontroller, 12-bit Analog I/o, Arm7tdmi Mcu With Enhanced Irq Handler
Manufacturer
Analog Devices, Inc.
Datasheet
1.ADUC7023BCPZ62IRL.pdf
(96 pages)
ADuC7023
ADC CIRCUIT OVERVIEW
The analog-to-digital converter (ADC) incorporates a fast,
multichannel, 12-bit ADC. It can operate from 2.7 V to 3.6 V
supplies and is capable of providing a throughput of up to
1 MSPS when the clock source is 41.78 MHz. This block
provides the user with a multichannel multiplexer, a differential
track-and-hold, an on-chip reference, and an ADC.
The ADC consists of a 12-bit successive approximation
converter based around two capacitor DACs. Depending on the
input signal configuration, the ADC can operate in one of three
different modes: fully differential mode (for small and balanced
signals), single-ended mode (for any single-ended signals), or
pseudo differential mode (for any single-ended signals), taking
advantage of the common-mode rejection offered by the
pseudo differential input.
The converter accepts an analog input range of 0 V to V
operating in single-ended or pseudo differential mode. In fully
differential mode, the input signal must be balanced around a
common-mode voltage (V
maximum amplitude of 2 V
A high precision, low drift, factory calibrated, 2.5 V reference is
provided on chip. An external reference can also be connected as
described later in the Band Gap Reference section.
Single or continuous conversion modes can be initiated in the
software. An external CONV
the on-chip PLA, or a Timer0 or Timer1 overflow can also be
used to generate a repetitive trigger for ADC conversions.
A voltage output from an on-chip band gap reference propor-
tional to absolute temperature can also be routed through the
front-end ADC multiplexer. This temperature channel can be
selected as an ADC input. This facilitates an internal temperature
sensor channel that measures die temperature.
TRANSFER FUNCTION
Pseudo Differential and Single-Ended Modes
In pseudo differential or single-ended mode, the input range is
0 V to V
differential and single-ended modes with
Figure 18. Examples of Balanced Signals in Fully Differential Mode
1 LSB = FS/4096, or
2.5 V/4096 = 0.61 mV, or
610 μV when V
REF
AV
V
. The output coding is straight binary in pseudo
CM
DD
0
REF
= 2.5 V
V
CM
CM
REF
) in the 0 V to AV
2V
START
V
(see Figure 18).
CM
REF
pin, an output generated from
2V
REF
DD
2V
range with a
REF
REF
when
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The ideal code transitions occur midway between successive
integer LSB values (that is, 1/2 LSB, 3/2 LSB, 5/2 LSB, … ,
FS − 3/2 LSB). The ideal input/output transfer characteristic
is shown in Figure 19.
Fully Differential Mode
The amplitude of the differential signal is the difference between
the signals applied to the V
V
therefore, −V
the common mode (CM). The common mode is the average of
the two signals, for example, (V
the voltage on which the two inputs are centered. This results in
the span of each input being CM ±V
set up externally, and its range varies with V
the Analog Inputs section).
The output coding is twos complement in fully differential mode
with 1 LSB = 2 V
V
one to the right. This allows the result in the ADCDAT MMR to
be declared as a signed integer when writing C code. The
designed code transitions occur midway between successive
integer LSB values (that is, 1/2 LSB, 3/2 LSB, 5/2 LSB, … , FS −
3/2 LSB). The ideal input/output transfer characteristic is shown
in Figure 20.
Figure 19. ADC Transfer Function in Pseudo Differential or Single-Ended Mode
IN−
REF
SIGN
). The maximum amplitude of the differential signal is,
BIT
= 2.5 V. The output result is ±11 bits, but this is shifted by
0 1111 1111 1110
0 1111 1111 1100
0 1111 1111 1010
0 0000 0000 0010
0 0000 0000 0000
1 1111 1111 1110
1 0000 0000 0100
1 0000 0000 0010
1 0000 0000 0000
1111 1111 1111
1111 1111 1110
1111 1111 1101
1111 1111 1100
0000 0000 0011
0000 0000 0010
0000 0000 0001
0000 0000 0000
Figure 20. ADC Transfer Function in Differential Mode
REF
to +V
REF
0V
–V
/4096 or 2 × 2.5 V/4096 = 1.22 mV when
REF
1LSB
REF
1LSB =
1LSB =
+ 1LSB
p-p (that is, 2 × V
IN+
2 × V
VOLTAGE INPUT (V
4096
4096
FS
and V
REF
IN+
VOLTAGE INPUT
+ V
0LSB
IN–
REF
IN–
/2. This voltage has to be
pins (that is, V
REF
)/2, and is, therefore,
). This is regardless of
IN
REF
+ – V
(see the Driving
IN
+V
+FS – 1LSB
–)
REF
IN+
– 1LSB
−