aduc7023bcpz62irl Analog Devices, Inc., aduc7023bcpz62irl Datasheet - Page 78
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aduc7023bcpz62irl
Manufacturer Part Number
aduc7023bcpz62irl
Description
Precision Analog Microcontroller, 12-bit Analog I/o, Arm7tdmi Mcu With Enhanced Irq Handler
Manufacturer
Analog Devices, Inc.
Datasheet
1.ADUC7023BCPZ62IRL.pdf
(96 pages)
- Current page: 78 of 96
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ADuC7023
IRQVEC Register
The IRQ interrupt vector register, IRQVEC, points to a memory
address containing a pointer to the interrupt service routine of
the currently active IRQ. This register should only be read when
an IRQ occurs and IRQ interrupt nesting has been enabled by
setting Bit 0 of the IRQCONN register.
IRQVEC Register
Name:
Address:
Default value:
Access:
IRQVEC
0xFFFF001C
0x00000000
Read only
Rev. 0 | Page 78 of 96
Table 88. IRQVEC MMR Bit Designations
Bit
31 to 23
22 to 7
6 to 2
1 to 0
Priority Registers
The IRQ interrupt vector register, IRQVEC, points to a memory
address containing a pointer to the interrupt service routine of
the currently active IRQ. This register should only be read when
an IRQ occurs and IRQ interrupt nesting has been enabled by
setting Bit 0 of the IRQCONN register.
Type
Read only
R/W
Read only
Reserved
Initial
Value
0
0
0
0
Description
Always read as 0.
IRQBASE register value.
Highest priority source. This is
a value between 0 and 21
representing the possible
interrupt sources. For example,
if the highest currently active
IRQ is Timer 2, then these bits
are [00100].
Reserved bits.
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