aduc7023bcpz62irl Analog Devices, Inc., aduc7023bcpz62irl Datasheet - Page 61

• Manufacturer Part Number: aduc7023bcpz62irl
• Description: Precision Analog Microcontroller, 12-bit Analog I/o, Arm7tdmi Mcu With Enhanced Irq Handler
• Manufacturer: Analog Devices, Inc.

I
Name:
Address:
Default value:
Access:
Function:
I
Name:
Address:
Default value:
Access:
Function:
I
Name:
Address:
Default value:
Access:
Function:
Table 64. I2CxMCNT0 MMR Bit Descriptions: Address =
0xFFFF0810, 0xFFFF0910. Default Value = 0x0000
Bit
15 to 9
8
7 to 0
2
2
2
C Master Receive Registers, I2CxMRX
C Master Transmit Registers, I2CxMTX
C Master Read Count Registers, I2CxMCNT0
Name
I2CRECNT
I2CRCNT
I2C0MRX, I2C1MRX
0x00
Read only
These 8-bit MMRs are the I
registers.
I2C0MTX, I2C1MTX
0x00, 0x00
Write only
These 8-bit MMRs are the I
registers
I2C0MCNT0, I2C1MCNT0
0x0000, 0x0000
Read/write
These 16-bit MMRs hold the required number
of bytes when the master begins a read
sequence from a slave device.
0xFFFF0808, 0xFFFF0908
0xFFFF080C 0xFFFF090C
0xFFFF0810, 0xFFFF0910
Description
Reserved.
This bit is set if greater than 256 bytes are
required from the slave.
This bit is cleared when reading 256 bytes
or less.
These eight bits hold the number of bytes
required during a slave read sequence,
minus 1. If only a single byte is required,
these bits should be set to 0.
2
2
C master receive
C master transmit
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I
Name:
Address:
Default value:
Access:
Function:
I
Name:
Address:
Default value:
Access:
Function:
Table 65. I2CxADR0 MMR in 7-Bit Address Mode: Address =
0xFFFF0818, 0xFFFF0918. Default Value = 0x00
Bit
7 to 1
0
Table 66. I2CxADR0 MMR in 10-Bit Address Mode
Bit
7 to 3
2 to 1
0
2
2
C Master Current Read Count Registers, I2CxMCNT1
C Address 0 Registers, I2CxADR0
Name
I2CADR
R/W
Name
I2CMADR
R/W
I2C0MCNT1, I2C1MCNT1
0xFFFF0814, 0xFFFF0914
0x00, 0x00
Read
These 8-bit MMRs hold the number of bytes
received thus far during a read sequence with a
slave device.
I2C0ADR0, I2C1ADR0
0xFFFF0818, 0xFFFF0918
0x00
Read/write
These 8-bit MMRs hold the 7-bit slave address
and the read/write bit when the master begins
communicating with a slave.
Description
These bits contain the 7-bit address of the
required slave device.
Bit 0 is the read/write bit.
When this bit = 1, a read sequence is
requested.
When this bit = 0, a write sequence is
requested.
Description
These bits must be set to [11110b] in 10-bit
address mode.
These bits contain ADDR[9:8] in 10-bit
address mode.
Read/write bit.
When this bit = 1, a read sequence is
requested.
When this bit = 0, a write sequence is
requested.
ADuC7023