ia3222 integration, ia3222 Datasheet - Page 28

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ia3222

Manufacturer Part Number
ia3222
Description
Ia3222/ia3223 Ez Daa? Chipset With Analog Interface
Manufacturer
integration
Datasheet

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IA3222/IA3223
Interfacing the IA3223
The simplified block diagram below shows single ended interface to A/D and D/A. The analog interface consists of 3 pins:
• TX – audio input
• RX – audio output
• ACREF – AC voltage reference
There are two ways to interface to A/D and D/A:
DC coupling
All three pins TX, RX and ACREF are connected to the codec directly. The ACREF pin has a weak internal buffer (refer to DC
characteristics table), which can be overdriven easily with an external reference. The external reference voltage must be in the 1.2V
to 1.8V range. Connecting the codec’s AC reference to the ACREF pin will insure good common mode rejection.
One of the advantages of DC coupling is an alternative way for the host processor to detect parallel pick-up (PPU). PPU may be
detected using LINESTAT pin, as described in the next section. The alternative way is to monitor the DC offset at the RX pin. (Line-
Side programming bit LP1 must be set to zero.) The DC loop current is added to the RX signal as a DC offset with a gain of about 1
mV/mA. Applying a digital low-pass filter to the RX channel audio enables the detection of a drop in the DC loop current, thus
indicating a PPU event.
AC coupling
All three pins TX, RX and ACREF may also be connected to codec using coupling capacitors. For the ACREF pin, a capacitor of at least
100nF is recommended. All coupling capacitors should be selected so that they will not cause any significant attenuation at low
frequencies, taking input resistances into account. The TX pin is internally biased at 1.5V.
Please contact Silicon Labs for additional assistance with interfacing the IA3223.
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