lm49350rl National Semiconductor Corporation, lm49350rl Datasheet - Page 49

• Manufacturer Part Number: lm49350rl
• Description: High Performance Audio Codec Sub-system With A Ground-referenced Stereo Headphone Amplifier & An Ultra Low Emi Class D Loudspeaker Amplifier With Dual I2s/pcm Digital Audio Interfaces
• Manufacturer: National Semiconductor Corporation

22.0 DAC Control Registers
This register is used to control the LM49350's DAC:
Bits
Bits
1:0
6:4
7:0
2
3
7
DAC_CLK_SEL
DAC_CLK_DIV
DSP_ONLY
MUTE_R
MUTE_L
MODE
Field
Field
This programs the over sampling ratio of the stereo DAC.
This digitally mutes the Left DAC output.
This digitally mutes the Right DAC output.
This selects the source of the DAC clock domain, DAC_SOURCE_CLK.
If set, the DAC's analog circuitry is disabled to reduce power consumption, however DAC DSP
functionality is maintained. This can be used to perform asyncronous resampling between audio rates
of a common family.
This programs the half cycle divider that precedes the DAC. The input of this divider should be
around 12MHz. The default of this divider is 0x00.
Program this divider with the division you want, multiplied by 2, and subtract 1.
DAC_CLK_SEL
000
001
010
011
100
TABLE 31. DAC_CLK_DIV (0x31h)
TABLE 30. DAC Basic (0x30h)
DAC_CLK_DIV
00000000
00000001
00000010
00000011
11111101
11111110
11111111
MODE
—
00
01
10
11
49
Description
Description
PORT1_RX_CLK
PORT2_RX_CLK
PLL1_OUTPUT1
PLL2_OUTPUT
Source
MCLK
DAC Oversampling Ratio
Divides by
127.5
127
128
1.5
—
125
128
1
1
2
64
32
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