lm49350rl National Semiconductor Corporation, lm49350rl Datasheet - Page 7

• Manufacturer Part Number: lm49350rl
• Description: High Performance Audio Codec Sub-system With A Ground-referenced Stereo Headphone Amplifier & An Ultra Low Emi Class D Loudspeaker Amplifier With Dual I2s/pcm Digital Audio Interfaces
• Manufacturer: National Semiconductor Corporation

1.0 General Description ......................................................................................................................... 1
2.0 Applications .................................................................................................................................... 1
3.0 Key Specifications ........................................................................................................................... 1
4.0 Features ........................................................................................................................................ 1
5.0 LM49350 Overview .......................................................................................................................... 2
6.0 Typical Application ........................................................................................................................... 3
7.0 Connection Diagrams ..................................................................................................................... 10
8.0 Absolute Maximum Ratings ............................................................................................................ 12
9.0 Operating Ratings ......................................................................................................................... 12
10.0 Electrical Characteristics: A_V
11.0 Timing Characteristics: DV
12.0 Typical Performance Characteristics .............................................................................................. 17
13.0 System Control ............................................................................................................................ 24
14.0 Device Register Map .................................................................................................................... 27
15.0 Basic PMC Setup Register ............................................................................................................ 32
16.0 PMC Clocks Register ................................................................................................................... 33
17.0 PMC Clock Divide Register ........................................................................................................... 33
18.0 LM49350 Clock Network .............................................................................................................. 34
19.0 PLL Setup Registers .................................................................................................................... 36
20.0 Analog Mixer Control Registers ..................................................................................................... 41
21.0 ADC Control Registers ................................................................................................................. 47
22.0 DAC Control Registers ................................................................................................................. 49
23.0 Digital Mixer Control Registers ...................................................................................................... 50
24.0 Audio Port Control Registers ......................................................................................................... 54
25.0 Digital Effects Engine ................................................................................................................... 59
26.0 DAC Effects Registers .................................................................................................................. 77
27.0 GPIO Registers ........................................................................................................................... 95
28.0 Schematic Diagram ...................................................................................................................... 97
29.0 Demonstration Board Layout ......................................................................................................... 98
30.0 Revision History ........................................................................................................................ 101
31.0 Physical Dimensions .................................................................................................................. 102
FIGURE 1. LM49350 Block Diagram ............................................................................................................. 2
FIGURE 2. Example Application in Multimedia Phone with a Dedicated Earpiece and Mono Loudspeaker ......................... 3
FIGURE 3. Example Application in Multimedia Phone Using Stereo Loudspeaker ...................................................... 4
FIGURE 4. Example Application in a Multimedia Phone Using a Dedicated RF Module for Voice Modern Functions ............. 5
FIGURE 5. Example Application in a Portable Media Player with a Differential Stereo Line Input .................................... 6
TABLE 1. Device Register Map .................................................................................................................. 27
TABLE 2. PMC_SETUP (0x00h) ................................................................................................................. 32
TABLE 3. PMC_SETUP (0x01h) ................................................................................................................. 33
TABLE 4. PMC_SETUP (0x02h) (Default data value is 0x50h) ............................................................................. 33
TABLE 5. DAC Clock Requirements ............................................................................................................. 34
TABLE 6. ADC Clock Requirements ............................................................................................................. 34
TABLE 7. PLL_CLOCK_SOURCE (0x03h) .................................................................................................... 36
TABLE 8. PLL1_M (0x04h) ........................................................................................................................ 37
TABLE 9. PLL1_N (0x05h) ........................................................................................................................ 37
TABLE 10. PLL1_N_MOD (0x06h) .............................................................................................................. 38
TABLE 11. PLL1_P1 (0x07h) ..................................................................................................................... 38
TABLE 12. PLL1_P2 (0x08h) ..................................................................................................................... 38
TABLE 13. PLL2_M (0x09h) ...................................................................................................................... 39
TABLE 14. PLL2_N (0x0Ah) ...................................................................................................................... 39
TABLE 15. PLL2_N_MOD (0x0Bh) .............................................................................................................. 39
7.1 PIN TYPE DEFINITIONS .............................................................................................................. 11
specifications apply for R
R
13.1 I
13.2 I
13.3 I
13.4 TRANSFERRING DATA ............................................................................................................. 24
13.5 I
L(HP)
2
2
2
2
= 32Ω, f = 1kHz, unless otherwise specified. Limits apply for T
C SIGNALS ............................................................................................................................ 24
C DATA VALIDITY .................................................................................................................. 24
C START AND STOP CONDITIONS .......................................................................................... 24
C TIMING PARAMETERS ....................................................................................................... 26
L(LS)
= 8Ω, R
DD
L(HP)
= I/OV
DD
= LS_V
= 32Ω, f = 1kHz, unless otherwise specified. Limits apply for T
DD
Table of Contents
= 1.8V
DD
List of Figures
List of Tables
= 3.3V; D_V
(Notes 1, 2)
7
DD
A
= 25°C.
= I/O_V
The following specifications apply for R
...................................................... 16
DD
= 1.8V
(Notes 1, 2)
A
= 25°C.
The following
L(SP)
www.national.com
= 8Ω,
......... 12