74aup1t45 NXP Semiconductors, 74aup1t45 Datasheet - Page 26

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74aup1t45

Manufacturer Part Number
74aup1t45
Description
Low-power Dual Supply Translating Transceiver; 3-state
Manufacturer
NXP Semiconductors
Datasheet

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NXP Semiconductors
74AUP1T45_1
Product data sheet
Fig 10. Bidirectional logic level-shifting application
System-1 and system-2 must use the same conditions, i.e., both pull-up or both pull-down.
DIR CTRL
V
I/O-1
CC1
13.2 Bidirectional logic level-shifting application
System-1
Figure 10
application. Since the device does not have an output enable (OE) pin, the system
designer should take precautions to avoid bus contention between system-1 and
system-2 when changing directions.
Table 12
and then from system-2 to system-1.
Table 12.
[1]
[2]
State DIR CTRL I/O-1
1
2
3
4
PULL-UP/DOWN
BUSHOLD
System-1 and system-2 must use the same conditions, i.e., both pull-up or both pull-down.
H = HIGH voltage level;
L = LOW voltage level;
Z = high-impedance OFF-state.
OR
H
H
L
L
gives a sequence that will illustrate data transmission from system-1 to system-2
shows the 74AUP1T45 being used in a bidirectional logic level-shifting
Description bidirectional logic level-shifting application
V
CC1
output
Z
Z
input
V
CC(A)
GND
Rev. 01 — 18 October 2006
A
1
2
3
I/O-2
input
Z
Z
output
74AUP1T45
Low-power dual supply translating transceiver; 3-state
Description
system-1 data to system-2
system-2 is getting ready to send data to system-1.
I/O-1 and I/O-2 are disabled. The bus-line state
depends on the pull-up or pull-down.
DIR bit is flipped. I/O-1 and I/O-2 still are disabled. The
bus-line state depends on the pull-up or pull-down.
system-2 data to system-1
6
5
4
V
DIR
B
CC(B)
V
CC2
PULL-UP/DOWN
BUSHOLD
OR
System-2
[1][2]
74AUP1T45
© NXP B.V. 2006. All rights reserved.
V
I/O-2
CC2
001aae970
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