74aup2g79gt NXP Semiconductors, 74aup2g79gt Datasheet - Page 11

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74aup2g79gt

Manufacturer Part Number
74aup2g79gt
Description
74aup2g79 Low-power Dual D-type Flip-flop; Positive-edge Trigger
Manufacturer
NXP Semiconductors
Datasheet
NXP Semiconductors
Table 8.
Voltages are referenced to GND (ground = 0 V); for test circuit see
[1]
[2]
[3]
12. Waveforms
74AUP2G79_1
Product data sheet
Symbol Parameter
C
Fig 7. The clock input (nCP) to output (nQ) propagation delays
PD
All typical values are measured at nominal V
t
C
P
f
f
C
V
N = number of inputs switching;
pd
i
o
(C
D
CC
PD
= input frequency in MHz;
L
= output frequency in MHz;
is the same as t
= output load capacitance in pF;
= C
L
is used to determine the dynamic power dissipation (P
= supply voltage in V;
Measurement points are given in
Logic levels: V
power
dissipation
capacitance
PD
V
Dynamic characteristics
CC
2
V
CC
f
o
2
) = sum of the outputs.
PLH
f
i
OL
Conditions
f = 1 MHz; V
N + (C
and t
and V
V
V
V
V
V
V
CC
CC
CC
CC
CC
CC
PHL
OH
= 0.8 V
= 1.1 V to 1.3 V
= 1.4 V to 1.6 V
= 1.65 V to 1.95 V
= 2.3 V to 2.7 V
= 3.0 V to 3.6 V
L
nCP input
nQ output
are typical output voltage drop that occur with the output load.
nD input
V
CC
I
= GND to V
2
…continued
Table
GND
GND
V
V
f
o
OH
OL
) where:
V
V
CC
I
I
9.
.
CC
Rev. 01 — 6 October 2006
[3]
V
M
D
Min Typ
t
in W).
V
PHL
-
-
-
-
-
-
M
Low-power dual D-type flip-flop; positive-edge trigger
25 C
1.6
1.7
1.8
2.3
2.7
1.9
Figure
[1]
Max
9.
-
-
-
-
-
-
V
M
(85 C)
t
Min
PLH
V
M
-
-
-
-
-
-
40 C to +125 C
001aaf271
(85 C)
Max
-
-
-
-
-
-
74AUP2G79
(125 C)
Min
-
-
-
-
-
-
© NXP B.V. 2006. All rights reserved.
(125 C)
Max
-
-
-
-
-
-
11 of 19
Unit
pF
pF
pF
pF
pF
pF

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