74aup2g79gt NXP Semiconductors, 74aup2g79gt Datasheet - Page 12
74aup2g79gt
Manufacturer Part Number
74aup2g79gt
Description
74aup2g79 Low-power Dual D-type Flip-flop; Positive-edge Trigger
Manufacturer
NXP Semiconductors
Datasheet
1.74AUP2G79GT.pdf
(19 pages)
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NXP Semiconductors
Table 9.
74AUP2G79_1
Product data sheet
Supply voltage
V
0.8 V to 3.6 V
Fig 8. The clock input (nCP) to output (nQ) propagation delays, nCP clock pulse width, nD to nCP set-up times,
CC
Measurement points are given in
Logic levels: V
nCP to nD hold times and the nCP maximum frequency
Measurement points
OL
and V
nCP input
nQ output
nD input
OH
Output
V
0.5
M
are typical output voltage drop that occur with the output load.
V
GND
GND
V
V
CC
OH
OL
V
V
Table
I
I
9.
V
Rev. 01 — 6 October 2006
M
t
su
Input
V
0.5
M
t
h
V
M
V
Low-power dual D-type flip-flop; positive-edge trigger
CC
t
t
PHL
V
W
M
1/fmax
t
su
V
V
I
CC
t
h
t
PLH
001aaf272
74AUP2G79
t
r
3.0 ns
= t
© NXP B.V. 2006. All rights reserved.
f
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