at49lh00b4 ATMEL Corporation, at49lh00b4 Datasheet - Page 32
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at49lh00b4
Manufacturer Part Number
at49lh00b4
Description
4-megabit Top Boot, Bottom Partitioned Firmware Hub And Low-pin Count Flash Memory
Manufacturer
ATMEL Corporation
Datasheet
1.AT49LH00B4.pdf
(41 pages)
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22. FWH/LPC Interface AC Timing Specifications
22.1
Notes:
22.2
23. Signal Timing Parameters
Notes:
32
Symbol
t
t
t
–
–
Symbol
t
t
t
t
t
t
t
t
t
t
CYC
HIGH
LOW
CHQX
CHQX
CHQZ
AVCH
DVCH
CHAX
CHDX
VSPL
CSPL
PLQZ
Clock Specification
1. PCI components must work with any clock frequency between nominal DC and 33 MHz. Frequencies less than16 MHz may
2. Applies only to rising edge of signal.
Clock Waveform
1. Minimum and maximum times have different loads. See PCI spec.
2. For purposes of Active/Float timing measurements, the high-Z or “off” state is defined to be when the total current delivered
3. This parameter applies to any input type (excluding CLK).
AT49LH00B4
be guaranteed by design rather than testing.
through the component pin is less than or equal to the leakage current specification.
Parameter
CLK Cycle Time
CLK High Time
CLK Low Time
CLK Slew Rate
RST or INIT Slew Rate
0.3 V
0.4 V
PCI Symbol
t
t
t
t
t
t
t
t
VAL
ON
OFF
SU
H
RST
RST-CLK
RST-OFF
CC
0.5 V
CC
(1)
CC
(2)
Parameter
CLK to Data Out
CLK to Active (Float to Active Delay)
CLK to Inactive (Active to Float Delay)
Input Set-up Time
Input Hold Time
Reset Active Time after Power Stable
Reset Active Time after CLK Stable
Reset Active to Output Float Delay
0.6 V
t
HIGH
CC
(3)
(1)
(3)
Condition
peak-to-peak
t
CYC
(2)
(2)
0.2 V
(2)
t
LOW
CC
Min
30
11
11
50
1
Min
100
2
2
7
0
1
0.4 V
(minimum)
Max
CC, p-to-p
4
•
Max
11
28
48
3379C–FLASH–3/05
mV/ns
Units
V/ns
Units
ns
ns
ns
ms
ns
ns
ns
µs
ns
ns
ns