lm5102sdx National Semiconductor Corporation, lm5102sdx Datasheet

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lm5102sdx

Manufacturer Part Number
lm5102sdx
Description
High Voltage Half-bridge Gate Driver With Programmable Delay
Manufacturer
National Semiconductor Corporation
Datasheet

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© 2004 National Semiconductor Corporation
LM5102
High Voltage Half-Bridge Gate Driver with Programmable
Delay
General Description
The LM5102 High Voltage Gate Driver is designed to drive
both the high side and the low side N-Channel MOSFETs in
a synchronous buck or a half bridge configuration. The float-
ing high-side driver is capable of working with supply volt-
ages up to 100V. The outputs are independently controlled.
The rising edge of each output can be independently de-
layed with a programming resistor. An integrated high volt-
age diode is provided to charge the high side gate drive
bootstrap capacitor. A robust level shifter operates at high
speed while consuming low power and providing clean level
transitions from control logic to the high side gate driver.
Under-voltage lockout is provided on both the low side and
the high side power rails. This device is available in the
standard MSOP-10 pin and the LLP-10 pin packages.
Features
n Drives both a high side and low side N-channel
n Independently programmable high and low side rising
Simplified Block Diagram
MOSFET
edge delay
DS200889
FIGURE 1.
n Bootstrap supply voltage range up to 118V DC
n Fast turn-off propagation delay (25 ns typical)
n Drives 1000 pF loads with 15 ns rise and fall times
n Supply rail under-voltage lockout
n Low power consumption
n Timer can be terminated midway through sequence
Typical Applications
n Current Fed push-pull power converters
n Half and Full Bridge power converters
n Synchronous Buck converters
n Two switch forward power converters
n Forward with Active Clamp converters
Package
n MSOP-10
n LLP-10 (4 mm x 4 mm)
20088902
January 2004
www.national.com

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lm5102sdx Summary of contents

Page 1

... MOSFET n Independently programmable high and low side rising edge delay Simplified Block Diagram © 2004 National Semiconductor Corporation n Bootstrap supply voltage range up to 118V DC n Fast turn-off propagation delay (25 ns typical) n Drives 1000 pF loads with 15 ns rise and fall times n Supply rail under-voltage lockout ...

Page 2

... Connection Diagram Ordering Information Ordering Number Package Type LM5102MM MSOP-10 LM5102MMX MSOP-10 LM5102SD LM5102SDX Pin Descriptions Pin Name MSOP-10 LLP- Positive gate drive supply High side gate driver bootstrap rail High side gate driver output High side MOSFET source ...

Page 3

Absolute Maximum Ratings If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications Inputs to V –0. ...

Page 4

Electrical Characteristics apply over the full operating junction temperature range. Unless otherwise specified, V RT1 = RT2 = 100kΩ. No Load HO. (Continued) Symbol Parameter V High-Level Output Voltage OHH I Peak Pullup Current OHH I Peak ...

Page 5

Typical Performance Characteristics I vs Frequency DD Quiescent Current vs Supply Voltage I vs Frequency HB Operating Current vs Temperature 20088910 Quiescent Current vs Temperature 20088912 HO & LO Peak Output Current vs Output Voltage 20088916 5 20088911 20088913 20088917 ...

Page 6

Typical Performance Characteristics Diode Forward Voltage Undervoltage Rising Threshold vs Temperature LO & HO Gate Drive — Low Level Output Voltage vs Temperature www.national.com (Continued) Undervoltage Threshold Hysteresis vs Temperature 20088915 LO & HO Gate Drive — High Level Output ...

Page 7

Typical Performance Characteristics Turn On Delay vs RT Resistor Value Turn On Delay vs Temperature (RT = 100k) (Continued) Turn On Delay vs Temperature (RT = 10k) 20088914 20088927 7 20088926 www.national.com ...

Page 8

LM5102 Waveforms Operational Notes The LM5102 offers a unique flexibility with independently programmable delay of the rising edge for both high and low side driver outputs independently. The delays are set with resistors at the RT1 and RT2 pins, and ...

Page 9

Operational Notes (Continued) held low until V exceeds UVLO threshold, typically about DD 6.9V. Any UVLO condition on the bootstrap capacitor will disable only the high side output (HO). LAYOUT CONSIDERATIONS The optimum performance of high and low side gate ...

Page 10

Operational Notes (Continued) Diode Power Dissipation V Diode Power Dissipation V www.national.com The total IC power dissipation can be estimated from the above plots by summing the gate drive losses with the bootstrap diode losses for the intended application. Because ...

Page 11

Operational Notes (Continued) LM5102 Driving MOSFETs Connected in Half-Bridge Configuration FIGURE 4. 11 20088908 www.national.com ...

Page 12

Physical Dimensions Notes: Unless otherwise specified 1. Standard lead finish to be 200 microinches/5.00 micrometers minimum tin/lead (solder) on copper. 2. Pin 1 identification to have half of full circle option JEDEC registration as of Feb. 2000. www.national.com ...

Page 13

... NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant ...

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