l99mc6tr-lf STMicroelectronics, l99mc6tr-lf Datasheet - Page 27

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l99mc6tr-lf

Manufacturer Part Number
l99mc6tr-lf
Description
Configurable 6-channel Device
Manufacturer
STMicroelectronics
Datasheet
L99MC6
8
8.1
8.1.1
8.1.2
8.1.3
8.1.4
Functional description of the SPI
Signal description
Serial clock (SCK)
This input signal provides the timing of the serial interface. Data present at serial data input
(SDI) is latched on the rising edge of serial clock (SCK). Data on serial data output (SDO) is
shifted out at the falling edge of serial clock (see
The SPI can be driven by a microcontroller with its SPI peripherals running in following
mode: CPOL = 0 and CPHA = 0 (see
Serial data input (SDI)
This input is used to transfer data serially into the device. It receives the data to be written.
Values are latched on the rising edge of serial clock (SCK).
Serial data output (SDO)
This output signal is used to transfer data serially out of the device. Data is shifted out on the
falling edge of serial clock (SCK).
DO also reflects the status of the <Global Error Flag> (<Global Status Register>, bit 7) while
CSN is low and no clock signal is present
Chip select not (CSN)
When this input signal is high, the device is deselected and serial data output (SDO) is high-
impedance. Driving this input low enables the communication. The communication must
start and stop on a low-level of serial clock (SCK).
Figure 11. Clock polarity and clock phase
Doc ID 16523 Rev 1
Figure
11).
Figure
11).
Functional description of the SPI
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