l99mc6tr-lf STMicroelectronics, l99mc6tr-lf Datasheet - Page 31

• Manufacturer Part Number: l99mc6tr-lf
• Description: Configurable 6-channel Device
• Manufacturer: STMicroelectronics

L99MC6
Figure 13. Indication of the global error flag on DO when CSN is low and SCK is stable
1. The last transferred SPI command is still valid in the input shift register. If SCK is stable (high or low) during a CSN low
pulse, at the rising edge of CSN the last transferred SPI command is still valid in the input shift register and is repeated.
Therefore, it is recommended to send a complete SPI frame to monitor the status of the L99MC6.
Table 17.
The <Global Error Flag> is generated by an OR-combination of all failure events of the
device (that is <Global Status Register>, [0:6]).
Writing to the selected data input register is only enabled if exactly one frame length is
transmitted within one communication frame (that is CSN low). If more or less clock pulses
are counted within one frame, the complete frame is ignored and a SPI frame error is
signaled in the Global Status register. This safety function is implemented to avoid
an unwanted activation of output stages by a wrong communication frame.
Bit
6
7
Communication error
Global Error flag
Global status register description (continued)
Description
Doc ID 16523 Rev 1
Active high
Active high
Polarity
Bit is set if the number of clock cycles during
CSN = low does not match with the specified
frame width or if an invalid bus condition is
detected (DI always 1).
DI always 0 automatically leads to clearing the
enable bit in CTRL0 and is not signaled as
communication error.
Logic OR combination of all failures in the
<Global Status Byte>.
Functional description of the SPI
Comment
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