tmp88cs43fg TOSHIBA Semiconductor CORPORATION, tmp88cs43fg Datasheet - Page 160

• Manufacturer Part Number: tmp88cs43fg
• Description: 8 Bit Microcontroller Tlcs-870/x Series
• Manufacturer: TOSHIBA Semiconductor CORPORATION

driver)
13. Motor Control Circuit (PMD: Programmable motor
EMGCRB
EMGCRA
13.5.5 Functions of Protective Circuit Registers
7 to 4
3, 2
7
6
5
4
1
0
2
1
0
EMGREL
RTPWM
EMGEN
EMGST
RTTM1
CNTST
CLCNT
CLMD
RTCL
CLST
CLEN
RTE
EMG disable
Return from overload protec-
tive state
Return by PWM sync
Return by timer sync
Overload protective state
Select output disabled
phases during overload pro-
tection
Stop counter during overload
protection
Enable/Disable overload pro-
tection
Overload protection sampling
time
EMG protective state
Return from EMG protective
state
Enable/Disable EMG protec-
tive circuit
The EMG protective circuit is disable from the disabled state by writing “5AH“ and “A5H“
to this register in that order. After that, the EMGCRA Register needs to be set.
When this bit is set to 1, the motor control circuit is returned from overload protective state
in software (e.g., by writing to this register). Also, the current state can be known by read-
ing this bit. MDOUT outputs at return from the overload protective state remain as set
before the overload protective input was driven active.
When this bit is set to 1, the motor control circuit is returned from overload protective state
by PWM sync. If RTCL is set to 1, RTCL has priority.
When this bit is set to 1, the motor control circuit is returned from overload protective state
by Timer 1 sync. If RTCL is set to 1, RTCL has priority.
The status of overload protection can be known by reading this bit.
Select the phases to be disabled against output during overload protection. This facility
allows selecting to disable no phases, all phases, PWM phases, or all upper phases/all
lower phases.
Can stop the PWM counter during overload protection.
Enable or disable the overload protective function.
Set the length of time the overload protective input port is sampled.
The status of EMG protection can be known by reading this bit.
The motor control circuit is returned from EMG protective state by setting this bit to “1” .
When returning, set the MDOUT Register A to 0 bits to “0” . Then set the EMGCRA Reg-
ister bit 1 to “1” and set MDOUT waveform output. Then set up the MDCRA Register.
The EMG protective circuit is activated by setting this bit to 1. This circuit initially is
enabled.
(To disable this circuit, make sure key code 5AH and A5H are written to the EMGREL1
Register beforehand.)
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TMP88CS43FG