tmp89fm42l TOSHIBA Semiconductor CORPORATION, tmp89fm42l Datasheet - Page 35
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tmp89fm42l
Manufacturer Part Number
tmp89fm42l
Description
8 Bit Microcontroller Tlcs-870/c1 Series
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet
1.TMP89FM42L.pdf
(428 pages)
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2.3.4
2.3.4.1
Clock for high-frequency clock
Clock for low-frequency clock
and it consists of a source clock selection circuit, a 3-stage frequency division circuit and a 14-stage counter.
becomes stable and secure the time after the STOP mode is released or the operation mode is changed before the
oscillation by the oscillation circuit becomes stable.
Warm-up counter
The warm-up counter is a circuit that counts the high-frequency clock (fc) and the low-frequency clock (fs),
The warm-up counter is used to secure the time after a power-on reset is released before the supply voltage
oscillation circuit (fc)
oscillation circuit (fs)
(1)
Warm-up counter operation when the oscillation is enabled by the hardware
voltage becomes stable and the time after a reset is released before the oscillation by the high-frequency
clock oscillation circuit becomes stable.
The warm-up counter serves to secure the time after a power-on reset is released before the supply
When a power-on reset is released or a reset is released
3. Machine cycle
base timer and other peripheral circuits.
of the divider becomes the output of stage 8 of the divider.
divider becomes fs/4. When SYSCR2<SYSCK> is "1", the outputs of stages 1 to 8 of the
divider and prescaler are stopped.
that follows the release of STOP mode.
corresponds to one main system clock.
ranging from 1-cycle instructions, which require one machine cycle for execution, to 10-cycle
instructions, which require 10 machine cycles for execution, and 13-cycle instructions, which
require 13 machine cycles for execution.
These circuits divide fcgck. The divided clocks are supplied to the timer counter, the time
When both SYSCR1<DV9CK> and SYSCR2<SYSCK> are "0", the input clock to stage 9
When SYSCR1<DV9CK> or SYSCR2<SYSCK> is "1", the input clock to stage 9 of the
The prescaler and divider are cleared to "0" at a reset and at the end of the warm-up operation
Instruction execution is synchronized with the main system clock (fm).
The minimum instruction execution unit is called a "machine cycle". One machine cycle
There are a total of 11 different types of instructions for the TLCS-870/C1 Series: 10 types
A
B
S
Z
Figure 2-6 Warm-up Counter Circuit
1 2 3
WUCSEL WUCDIV
WUCCR
Page 21
D
C
B
A
S
Z
Enable/disable counting up
WUCRST
1 2 3 4 5 6 7 8 9 10 11 12 13 14
Warm-up counter
XEN XTEN
controller
0 1 2 3 4 5 6 7
SYSCR2
WUCDR
Com-
parator
STOP
TMP89FM42L
Enable CPU operation
SYSCR1
INTWUC interrupt
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