tmp89fh40 TOSHIBA Semiconductor CORPORATION, tmp89fh40 Datasheet - Page 169

• Manufacturer Part Number: tmp89fh40
• Description: 8 Bit Microcontroller Tlcs-870/c1 Series
• Manufacturer: TOSHIBA Semiconductor CORPORATION

RB002
13.4
13.4.1
Table 13-3 Timer Mode Resolution and Maximum Time Setting
<TA0CK>
TA0MOD
width measurement and programmable pulse generate (PPG) output modes.
13.4.1.1
13.4.1.2
13.4.1.3
00
01
10
11
Timer counter A0 has six types of operation modes; timer, external trigger timer, event counter, window, pulse
Timer Function
at specified times.
In the timer mode, the up-counter counts up using the internal clock, and interrupts can be generated regularly
Timer mode
the source clock at TA0MOD<TA0CK>.
and TA0CR<TA0OVE> becomes invalid. Be sure to complete the required mode settings before starting the
timer.
source clock. When a match between the up-counter value and the value set to timer register A (TA0DRA)
is detected, an INTTCA0 interrupt request is generated and the up counter is cleared to "0x0000". After being
cleared, the up counter continues counting. Setting TA0CR<TA0S> to "0" during the timer operation causes
the up counter to stop counting and be cleared to "0x0000".
TA0CR<TA0ACAP> to "1" (auto capture function). When TA0CR<TA0ACAP> is "1", the current contents
of the up counter can be read by reading TA0DRBL. TA0DRBH is loaded at the same time as TA0DRBL is
read. Therefore, when reading the captured value, be sure to read TA0DRBL and TA0DRBH in this order.
(The capture time is the timing when TA0DRBL is read.) The auto capture function can be used whether the
timer is operating or stopped. When the timer is stopped, TA0DRBL is read as "0x00". TA0DRBH keeps the
captured value after the timer stops, but it is cleared to "0x00" when TA0DRBL is read while the timer is
stopped.
after the timer is started.
SYSCR1<DV9CK>
Note 1: The value set to TA0CR<TA0ACAP> cannot be changed at the same time as TA0CR<TA0S> is rewritten
Setting the operation mode selection TA0MOD<TA0M> to "000" or "001" activates the timer mode. Select
Setting TA0CR<TA0S> to "1" starts the timer operation. After the timer is started, writing to TA0MOD
Setting TA0CR<TA0S> to "1" allows the 16-bit up counter to increment based on the selected internal
The latest contents of the up counter can be taken into timer register B (TA0DRB) by setting
If the timer is started with TA0CR<TA0ACAP> written to "1", the auto capture is enabled immediately
Setting
Operation
Auto capture
NORMAL 1/2 or IDLE 1/2 mode
fcgck/2
fcgck/2
fcgck/2
fcgck/2
= "0"
from "1" to "0". (This setting is invalid.)
10
6
2
Source clock [Hz]
SYSCR1<DV9CK>
fcgck/2
fcgck/2
fcgck/2
= "1"
fs/2
3
6
2
SLEEP1 mode
SLOW1/2 or
fs/2
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Page 155
3
fcgck=10MHz
102.4μs
400ns
200ns
6.4μs
Resolution
fs=32.768kHz
244.1μs
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fcgck=10MHz
419.4ms
26.2ms
13.1ms
Maximum time setting
6.7s
TMP89FH40
fs=32.768kHz
16s
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