tmp89fh40 TOSHIBA Semiconductor CORPORATION, tmp89fh40 Datasheet - Page 6

• Manufacturer Part Number: tmp89fh40
• Description: 8 Bit Microcontroller Tlcs-870/c1 Series
• Manufacturer: TOSHIBA Semiconductor CORPORATION

3. Interrupt Control Circuit
4. External Interrupt control circuit
5. Watchdog Timer (WDT)
6. Power-on Reset Circuit
ii
3.1 Configuration...........................................................................................................................51
3.2 Interrupt Latches (IL25 to IL3)................................................................................................52
3.3 Interrupt Enable Register (EIR)...............................................................................................53
3.4 Maskable Interrupt Priority Change Function.........................................................................56
3.5 Interrupt Sequence...................................................................................................................58
3.6 Software Interrupt (INTSW)....................................................................................................62
3.7 Undefined Instruction Interrupt (INTUNDEF).......................................................................62
4.1 Configuration...........................................................................................................................63
4.2 Control.....................................................................................................................................63
4.3 Function...................................................................................................................................67
5.1 Configuration...........................................................................................................................73
5.2 Control.....................................................................................................................................74
5.3 Functions..................................................................................................................................76
6.1 Configuration...........................................................................................................................81
3.3.1
3.3.2
3.5.1
3.5.2
3.5.3
3.5.4
3.6.1
3.6.2
4.3.1
4.3.2
4.3.3
4.3.4
4.3.5
5.3.1
5.3.2
5.3.3
5.3.4
5.3.5
5.3.6
5.3.7
3.5.3.1
3.5.3.2
3.5.3.3
4.3.3.1
4.3.3.2
4.3.3.3
4.3.4.1
4.3.4.2
4.3.4.3
Interrupt master enable flag (IMF)....................................................................................................................................53
Individual interrupt enable flags (EF25 to EF4)................................................................................................................53
Initial Setting......................................................................................................................................................................58
Interrupt acceptance processing.........................................................................................................................................58
Saving/restoring general-purpose registers........................................................................................................................59
Interrupt return...................................................................................................................................................................61
Address error detection......................................................................................................................................................62
Debugging..........................................................................................................................................................................62
Low power consumption function.....................................................................................................................................68
External interrupt 0............................................................................................................................................................68
External interrupts 1/2/3....................................................................................................................................................69
External interrupt 4............................................................................................................................................................70
External interrupt 5............................................................................................................................................................72
Setting of enabling/disabling the watchdog timer operation.............................................................................................76
Setting the clear time of the 8-bit up counter.....................................................................................................................76
Setting the overflow time of the 8-bit up counter..............................................................................................................77
Setting an overflow detection signal of the 8-bit up counter.............................................................................................77
Writing the watchdog timer control codes.........................................................................................................................78
Reading the 8-bit up counter..............................................................................................................................................78
Reading the watchdog timer status....................................................................................................................................78
Using PUSH and POP instructions
Using data transfer instructions
Using a register bank to save/restore general-purpose registers
Interrupt request signal generating condition detection function
A noise canceller pass signal monitoring function when interrupt request signals are generated
Noise cancel time selection function
Interrupt request signal generating condition detection function
A noise canceller pass signal monitoring function when interrupt request signals are generated
Noise cancel time selection function