tmp19a43fd TOSHIBA Semiconductor CORPORATION, tmp19a43fd Datasheet - Page 55

• Manufacturer Part Number: tmp19a43fd
• Description: 32-bit Risc Microprocessor
• Manufacturer: TOSHIBA Semiconductor CORPORATION

FLCS
(0xFFFF_E520)
Bit 0: Ready/Busy flag bit
(note)Please issue it after confirming the command issue is always a ready state.
Bit 2: ROM type identification bit
Bits [7:4]: Protection status bits (can be set to any combination of blocks)
Bit Symbol
Read/Write
After reset
Bit Symbol
Read/Write
After reset
Bit Symbol
Read/Write
After reset
Bit Symbol
Read/Write
After reset
Function
Function
Function
Function
9) Flash control/ status register
A normal command not only is sent when the command is issued to a busy inside but also there is a possibility
that the command after that cannot be input. In that case, please return by system reset or the reset command.
This resister is used to monitor the status of the flash memory and to indicate the block protection
status.
The RDY/BSY output is provided as a means to monitor the status of automatic operation. This bit is a
function bit for the CPU to monitor the function. When the flash memory is in automatic operation, it outputs
"0" to indicate that it is busy. When the automatic operation is terminated, it returns to the ready state and
outputs "1" to accept the next command. If the automatic operation has failed, this bit maintains the "0"
output. By applying a hardware reset, it returns to "1."
This bit is read after reset to identify whether the ROM is a flash ROM or a mask ROM.
Flash ROM: "0"
Mask ROM: "1"
Each of the protection bits (4 bits) represents the protection status of the corresponding block. When a bit
is set to "1," it indicates that the block corresponding to the bit is protected. When the block is protected,
data cannot be written to it.
0000: No blocks are protected
xxx1: Block 0 is protected
xx1x: Block 1 is protected
x1xx: Block 2 is protected
1xxx: Block 3 is protected
BLPRO3
15
23
31
7
0
0
0
0
Protection area setting (for each 128 kB)
BLPRO2
Table 3-6 Flash Control Register
14
22
30
6
0
0
0
0
TMP19A43 (rev2.0)3-41
R
BLPRO1
13
21
29
5
0
0
0
0
Fig. 3-5
BLPRO0
12
20
28
4
0
0
0
0
R
R
R
Always
reads "0."
11
19
27
R
3
0
0
0
0
ROM ID bit
0: Flash
1: MROM
ROMTYPE
Flash Memory Operation
10
18
26
R
2
0
0
0
0
TMP19A43
Always
reads "0."
17
25
R
1
0
9
0
0
0
Ready/Busy
0: In
1: Operation
RDY/BSY
terminated
operation
16
24
R
0
1
8
0
0
0