tc9446fg TOSHIBA Semiconductor CORPORATION, tc9446fg Datasheet - Page 25

• Manufacturer Part Number: tc9446fg
• Description: Audio Digital Processor For Decode Of Dolby Digital Ac-3 , Mpeg2 Audio
• Manufacturer: TOSHIBA Semiconductor CORPORATION

Note 8: Crystal oscillation clock is as asynchronous as the system clocks (AD converter, DA converter, etc.) of
7. Flag Input (FI0-FI3 terminal)
8. Interruption Input (IRQ terminal)
9. General-Purpose Output Terminal (PO0-PO7 terminal)
Crystal Oscillation Clock
chosen.
correspond a maximum of 75 MIPS. The clock outputted from DLL circuit should choose a crystal
oscillation clock to be set to less than 150 MHz. The example of DLL clock by the crystal oscillation clock is
shown in Table 6.
FI3 terminal should fix each terminal to “H”, or since pull-up resistance is built in, when not being
specified by the program, please it be open and be used for it.
programs. IRQ terminal should fix a terminal to “L”, or since pull down resistance is built in, when not
being specified by the program, please it be open and be used for it.
flag and the MCU for detection of internal operation, or the external LSI. However, the function and
operation of a terminal change with built-in programs. Since PO0-PO7 terminal contains pull-up resistance,
when not being specified by the program, please carry out and use each output terminal for opening.
“L” level will be outputted if it initializes with a reset terminal.
(asynchronous)
(asynchronous)
(asynchronous)
DLL oscillation clock can be chosen with DLCKS terminal and DLON terminal, as shown in Table 5.
When DLCKS terminal and DLON terminal are “L”, the external clock input from SCKI terminal is
An internal clock of operation is a half divided clock of the DLL clock, and processing speed can
It is used when inputting a flag from a MCU. However, a function changes with built-in programs. FI0 to
It is used when interrupting and inputting from a MCU. However, operation changes with built-in
It can be used when carrying out logic control of the case where it is used as an interruption output to the
At the time of a power-supply injection, the output of a general-purpose output terminal becomes unfixed.
DLCKS Terminal (93 pin)
(48 kHz * 256)
(48 kHz * 384)
(48 kHz * 512)
(48 kHz * 768)
12.288 MHz
18.432 MHz
24.576 MHz
36.864 MHz
25.00 MHz
27.00 MHz
external LSI. A case needs to input the clock oscillated externally into CKI terminal, and needs to
synchronize with them.
30.0 MHz
“H”
“H”
“L”
“L”
Table 6 Crystal Oscillation Clock and DLL Clock
(36 MIPS operation)
(55 MIPS operation)
(73 MIPS operation)
(75 MIPS operation)
Table 5 Setup of DLL Circuit
6
110.592 MHz
147.456 MHz
th
Not available
Not available
Not available
73.728 MHz
to 150 MHz
Times Clock
DLON Terminal (92 pin)
25
“H”
“H”
“L”
“L”
(24 MIPS operation)
(36 MIPS operation)
(49 MIPS operation)
(50 MIPS operation)
(54 MIPS operation)
(60 MIPS operation)
4
Not available
th
49.152 MHz
73.728 MHz
98.304 MHz
100.00 MHz
108.00 MHz
to 120 MHz
Times Clock
SCKI input (DLL = off)
DLL Oscillation Clock
XI input * 4
XI input * 3
XI input * 6
(18 MIPS operation)
(27 MIPS operation)
(36 MIPS operation)
(37 MIPS operation)
(40 MIPS operation)
(45 MIPS operation)
(55 MIPS operation)
3
110.592 MHz
rd
38.864 MHz
55.296 MHz
73.728 MHz
75.00 MHz
81.00 MHz
90.00 MHz
Times Clock
th
rd
th
TC9446FG
times
times
times
2005-09-28