lnbh25pqr STMicroelectronics, lnbh25pqr Datasheet - Page 18

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lnbh25pqr

Manufacturer Part Number
lnbh25pqr
Description
Lnb Supply And Control Ic With Step-up And I²c Interface
Manufacturer
STMicroelectronics
Datasheet

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I²C interface protocol
7
7.1
18/34
S
S
MSB
MSB
0
0
I²C interface protocol
Write mode transmission
The LNBH25 interface protocol comprises:
Figure 11. Example of writing procedure starting with first data address 0x2
ACK = Acknowledge
S = Start
P = Stop
R/W = 1/0, Read/Write bit
X = 0/1, set the values to select the CHIP ADDRESS (see Chip Address in
selection) and to select the REGISTER Address (see
a. The writing procedure can start from any Register Address by simply setting the X values in the Register
0
0
CHIP ADDRESS
CHIP ADDRESS
MSB
MSB
Address byte (after the Chip Address). It can be also stopped from the master by sending a stop condition after
any acknowledge bit.
0
0
a start condition (S)
a chip address byte with the LSB bit R/W = 0
a register address (internal address of the first register to be accessed)
a sequence of data (byte to write in the addressed internal register + acknowledge)
the following bytes, if any, to be written in successive internal registers
a stop condition (P). The transfer lasts until a stop bit is encountered
the LNBH25, as slave, acknowledges every byte transfer.
1
1
Add=0x2
Add=0x2
DATA 1
DATA 1
0
0
0
X
X
LSB
LSB
LSB
LSB
MSB
MSB
0
0
REGISTER ADDRESS
REGISTER ADDRESS
MSB
MSB
0 0
0 0
0 0 X
0 0 X
Add=0x3
Add=0x3
DATA 2
DATA 2
Doc ID 022433 Rev 3
X X
X X
LSB
LSB
LSB
LSB
MSB
MSB
Add=0x4
Add=0x4
DATA 3
DATA 3
Table 7
LSB
LSB
).
MSB
MSB
DATA 4
DATA 4
Add=0x5
Add=0x5
Table 16
LSB
LSB
AM09913v2
LNBH25
(a)
for pin
P P

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