lnbh25pqr STMicroelectronics, lnbh25pqr Datasheet - Page 6

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lnbh25pqr

Manufacturer Part Number
lnbh25pqr
Description
Lnb Supply And Control Ic With Step-up And I²c Interface
Manufacturer
STMicroelectronics
Datasheet

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Application information
2.3
2.4
2.5
6/34
Figure 2.
Data encoding by external DiSEqC envelope control through
the DSQIN pin
If an external DiSEqC envelope source is available, it is possible to use the internal 22 kHz
generator activated during the tone transmission by connecting the DiSEqC envelope
source to the DSQIN pin. In this case the I²C Tone control bits must be set: EXTM = 0 and
TEN = 1. In this way, the internal 22 kHz signal is superimposed to the V
generate the LNB output 22 kHz tone. During the period in which the DSQIN is kept HIGH,
the internal control circuit activates the 22 kHz tone output.
The 22 kHz tone on the V
signal rising edge, and it stops with a delay time in the range from 15 µs to 60 µs after the 22
kHz TTL signal on DSQIN has expired (refer to
Figure 3.
LPM (low power mode)
In order to reduce total power loss, the LNBH25 is provided with the LPM I²C bit that can be
activated (LPM=1) in applications where the 22 kHz tone can be disabled for long time
periods. The LPM bit can be set to “1” when the DiSEqC data transmission is not requested
(no 22 kHz tone output is present); at this condition the drop voltage across the integrated
LDO regulator (V
the LNBH25 linear regulator is reduced too. For example: at 500 mA load, LPM=1 allowing a
minimum LDO dissipated power of 0.3 W typ. It is recommended to set the LPM bit to “0”
before starting the 22 kHz DiSEqC data transmission; at this condition the drop voltage
across the LDO is kept to 1 V typ. Keep LPM=0 at all times in case the LPM function is not
used.
DiSEqC 2.0 implementation
The built-in 22 kHz tone detector completes the fully bi-directional DiSEqC 2.0 interfacing.
The input pin (DETIN) must be AC coupled to the DiSEqC BUS, and extracted PWK data is
available on the DSQOUT pin. To comply with the bi-directional DiSEqC 2.0 bus hardware
Tone enable and disable timing (using external waveform)
Tone enable and disable timing (using envelope signal)
UP
Tone
Output
DSQIN
Tone
Output
DSQIN
-V
OUT
~ 6 µs
~ 1 µs
OUT
) is reduced to 0.6 V typ. and, consequently, the power loss inside
Doc ID 022433 Rev 3
pin is activated with about 6 µs delay from the DSQIN TTL
Figure 3
).
15 µs ~ 60 µs
~ 60 µs
AM10426v1
AM10427v1
OUT
DC voltage to
LNBH25

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