atmega3250v-8auatmega325v-8ai ATMEL Corporation, atmega3250v-8auatmega325v-8ai Datasheet - Page 153

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atmega3250v-8auatmega325v-8ai

Manufacturer Part Number
atmega3250v-8auatmega325v-8ai
Description
Atmega3250 8-bit Microcontroller With In-system Programmable Flash
Manufacturer
ATMEL Corporation
19.5
19.5.1
2570L–AVR–08/07
Register Description
SPCR – SPI Control Register
Figure 19-3. SPI Transfer Format with CPHA = 0
Figure 19-4. SPI Transfer Format with CPHA = 1
• Bit 7 – SPIE: SPI Interrupt Enable
This bit causes the SPI interrupt to be executed if SPIF bit in the SPSR Register is set and the if
the Global Interrupt Enable bit in SREG is set.
• Bit 6 – SPE: SPI Enable
When the SPE bit is written to one, the SPI is enabled. This bit must be set to enable any SPI
operations.
Bit
0x2C (0x4C)
Read/Write
Initial Value
SCK (CPOL = 0)
mode 0
SCK (CPOL = 1)
mode 2
SAMPLE I
MOSI/MISO
CHANGE 0
MOSI PIN
CHANGE 0
MISO PIN
SCK (CPOL = 0)
mode 1
SCK (CPOL = 1)
mode 3
SAMPLE I
MOSI/MISO
CHANGE 0
MOSI PIN
CHANGE 0
MISO PIN
SS
SS
MSB first (DORD = 0)
LSB first (DORD = 1)
MSB first (DORD = 0)
LSB first (DORD = 1)
SPIE
R/W
7
0
SPE
R/W
6
0
MSB
LSB
DORD
MSB
LSB
R/W
5
0
Bit 6
Bit 1
Bit 6
Bit 1
MSTR
R/W
4
0
Bit 5
Bit 2
ATmega325/3250/645/6450
Bit 5
Bit 2
CPOL
R/W
3
0
Bit 4
Bit 3
Bit 4
Bit 3
CPHA
R/W
Bit 3
Bit 4
2
0
Bit 3
Bit 4
SPR1
Bit 2
Bit 5
R/W
1
0
Bit 2
Bit 5
Bit 1
Bit 6
SPR0
R/W
0
0
Bit 1
Bit 6
LSB
MSB
SPCR
LSB
MSB
153

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