atmega3250v-8auatmega325v-8ai ATMEL Corporation, atmega3250v-8auatmega325v-8ai Datasheet - Page 95

• Manufacturer Part Number: atmega3250v-8auatmega325v-8ai
• Description: Atmega3250 8-bit Microcontroller With In-system Programmable Flash
• Manufacturer: ATMEL Corporation

15.9
15.9.1
2570L–AVR–08/07
Register Description
TCCR0A – Timer/Counter Control Register A
Figure 15-11
Figure 15-11. Timer/Counter Timing Diagram, Clear Timer on Compare Match mode, with Pres-
• Bit 7 – FOC0A: Force Output Compare A
The FOC0A bit is only active when the WGM00 bit specifies a non-PWM mode. However, for
ensuring compatibility with future devices, this bit must be set to zero when TCCR0 is written
when operating in PWM mode. When writing a logical one to the FOC0A bit, an immediate com-
pare match is forced on the Waveform Generation unit. The OC0A output is changed according
to its COM0A1:0 bits setting. Note that the FOC0A bit is implemented as a strobe. Therefore it is
the value present in the COM0A1:0 bits that determines the effect of the forced compare.
A FOC0A strobe will not generate any interrupt, nor will it clear the timer in CTC mode using
OCR0A as TOP.
The FOC0A bit is always read as zero.
• Bit 6, 3 – WGM01:0: Waveform Generation Mode
These bits control the counting sequence of the counter, the source for the maximum (TOP)
counter value, and what type of waveform generation to be used. Modes of operation supported
by the Timer/Counter unit are: Normal mode, Clear Timer on Compare match (CTC) mode, and
two types of Pulse Width Modulation (PWM) modes. See
on page
Bit
0x24 (0x44)
Read/Write
Initial Value
TCNTn
(clk
(CTC)
OCRnx
OCFnx
clk
clk
I/O
I/O
Tn
/8)
89.
shows the setting of OCF0A and the clearing of TCNT0 in CTC mode.
FOC0A
caler (f
W
7
0
clk_I/O
WGM00
R/W
6
0
TOP - 1
/8)
COM0A1
R/W
5
0
COM0A0
R/W
4
0
ATmega325/3250/645/6450
TOP
WGM01
R/W
3
0
TOP
CS02
R/W
Table 15-2
2
0
BOTTOM
CS01
R/W
1
0
and
CS00
R/W
“Modes of Operation”
0
0
BOTTOM + 1
TCCR0
95