atmega3250v-8auatmega325v-8ai ATMEL Corporation, atmega3250v-8auatmega325v-8ai Datasheet - Page 266

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atmega3250v-8auatmega325v-8ai

Manufacturer Part Number
atmega3250v-8auatmega325v-8ai
Description
Atmega3250 8-bit Microcontroller With In-system Programmable Flash
Manufacturer
ATMEL Corporation
266
ATmega325/3250/645/6450
Table 27-4.
Note:
Table 27-5.
Note:
Fuse High Byte
OCDEN
JTAGEN
SPIEN
WDTON
EESAVE
BOOTSZ1
BOOTSZ0
BOOTRST
Fuse Low Byte
CKDIV8
CKOUT
SUT1
SUT0
CKSEL3
CKSEL2
CKSEL1
CKSEL0
(1)
1. The SPIEN Fuse is not accessible in serial programming mode.
2. The default value of BOOTSZ1..0 results in maximum Boot Size. See
3. See
4. Never ship a product with the OCDEN Fuse programmed regardless of the setting of Lock bits
5. If the JTAG interface is left unconnected, the JTAGEN fuse should if possible be disabled. This
1. The default value of SUT1..0 results in maximum start-up time for the default clock source.
2. The default setting of CKSEL3..0 results in internal RC Oscillator @ 8 MHz. See
3. The CKOUT Fuse allow the system clock to be output on PORTE7. See
4. See
(3)
(4)
(4)
(5)
(3)
for details.
and JTAGEN Fuse. A programmed OCDEN Fuse enables some parts of the clock system to
be running in all sleep modes. This may increase the power consumption.
to avoid static current at the TDO pin in the JTAG interface.
See
page 28
on page 30
Fuse High Byte
Fuse Low Byte
“Register Description” on page 46
Table 28-4 on page 300
“System Clock Prescaler” on page 31
for details.
for details.
Bit No
Bit No
5
4
7
6
5
4
3
2
1
0
7
6
3
2
1
0
Description
Enable OCD
Enable JTAG
Enable Serial Program and Data
Downloading
Watchdog Timer always on
EEPROM memory is preserved
through the Chip Erase
Select Boot Size (see
for details)
Select Boot Size (see
for details)
Select Reset Vector
Description
Divide clock by 8
Clock output
Select start-up time
Select start-up time
Select Clock source
Select Clock source
Select Clock source
Select Clock source
for details.
for details.
for details.
Table 27-6
Table 27-6
Default Value
1 (unprogrammed,
OCD disabled)
0 (programmed, JTAG
enabled)
0 (programmed, SPI
prog. enabled)
1 (unprogrammed)
1 (unprogrammed,
EEPROM not
preserved)
0 (programmed)
0 (programmed)
1 (unprogrammed)
Default Value
0 (programmed)
1 (unprogrammed)
1 (unprogrammed)
0 (programmed)
0 (programmed)
0 (programmed)
1 (unprogrammed)
0 (programmed)
Table 26-6 on page 261
“Clock Output Buffer”
(2)
(2)
(1)
(2)
(2)
(2)
2570L–AVR–08/07
(1)
(2)
Table 9-5 on

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