at91sam9g45 ATMEL Corporation, at91sam9g45 Datasheet - Page 19
at91sam9g45
Manufacturer Part Number
at91sam9g45
Description
At91 Arm Thumb-based Microcontrollers
Manufacturer
ATMEL Corporation
Datasheet
1.AT91SAM9G45.pdf
(54 pages)
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6.4
6.5
6438CS–ATARM–13-Oct-09
USB
DMA Controller
The AT91SAM9G45 features USB communication ports as follows:
USB Host Port A is directly connected to the first UTMI transceiver.
The Host Port B is multiplexed with the USB device High speed and connected to the second
UTMI port. The selection between Host Port B and USB device high speed is controlled by a the
bit UDPHS enable bit located in the UDPHS_CTRL control register.
Figure 6-1.
The DMA controller can handle the transfer between peripherals and memory and so receives
the triggers from the peripherals below. The hardware interface numbers are also given below in
Table
Table 6-6.
Instance Name
MCI0
SPI0
SPI0
SPI1
SPI1
SSC0
• 2 Ports USB Host full speed OHCI and High speed EHCI
• 1 Device High speed
• Two Masters
• Embeds 8 channels
• 64 bytes/FIFO for Channel Buffering
• Linked List support with Status Write Back operation at End of Transfer
• Word, HalfWord, Byte transfer support.
• memory to memory transfer
• Peripheral to memory
• Memory to peripheral
USB Selection
DMA Channel Definition
T/R
TX/RX
TX
RX
TX
RX
TX
Transceiver
DMA Channel HW
interface Number
0
1
2
3
4
5
PA
HS
HS EHCI
FS OHCI
DMA
PB
0
Transceiver
HS
USB
DMA
HS
1
EN_UDPHS
AT91SAM9G45
19