at91sam9g45 ATMEL Corporation, at91sam9g45 Datasheet - Page 34

• Manufacturer Part Number: at91sam9g45
• Description: At91 Arm Thumb-based Microcontrollers
• Manufacturer: ATMEL Corporation

8.7.1
8.7.1.1
8.7.1.2
34
AT91SAM9G45
Main Application Modes
Normal Mode
USB HS and LP-DDR Mode
Figure 8-4.
The Power Management Controller provides 3 main application modes.
• PLLA and UPLL are running respectively at 400 MHz and 480 MHz
• USB Device High Speed and Host EHCI High Speed operations are allowed
• Full Speed OHCI input clock is UPLLCK, USBDIV is 9 (division by 10)
• System Input clock is PLLACK, PCK is 400 MHz
• MDIV is ‘11’, MCK is 133 MHz
• DDR2 can be used at up to 133 MHz
• Only UPLL is running at 480 MHz, PLLA power consumption is saved
• USB Device High Speed and Host EHCI High Speed operations are allowed
• Full Speed OHCI input clock is UPLLCK, USBDIV is 9 (division by 10)
• System Input clock is UPLLCK, Prescaler is 2, PCK is 240 MHz
• MDIV is ‘01’, MCK is 120 MHz
• Only LP-DDR can be used at up to 120 MHz
PLLACK
/1,/2
UPLLCK
MAINCK
SLCK
AT91SAM9G45 Power Management Controller Block Diagram
USBS
Master Clock Controller
/1,/2,/4,.../64
Prescaler
UPLLCK
MAINCK
USBDIV+1
SLCK
Programmable Clock Controller
/1 /2
X /1 /1.5 /2
/4
Divider
/1,/2,/4,...,/64
/3 /4
Prescaler
UHP12M
UHP48M
ON/OFF
OHCI
USB
EHCI
USB
Clock Controller
Processor
Controller
Clock
Peripherals
ON/OFF
6438CS–ATARM–13-Oct-09
pck[..]
MCK
periph_clk[..]
SysClk DDR
PCK
int