at91sam9g45 ATMEL Corporation, at91sam9g45 Datasheet - Page 24

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at91sam9g45

Manufacturer Part Number
at91sam9g45
Description
At91 Arm Thumb-based Microcontrollers
Manufacturer
ATMEL Corporation
Datasheet

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7.2.4.1
7.2.4.2
7.3
7.3.1
24
External Memories
AT91SAM9G45
DDR2/LPDDR Interface
BMS = 1, boot on embedded ROM
BMS = 0, boot on external memory
If BMS is detected at 1, the boot memory is the embedded ROM.
If BMS is detected at 0, the boot memory is the memory connected on the Chip Select 0 of the
External Bus Interface.
The system boots on Boot Program.
For optimization purpose, nothing else is done. To speed up the boot sequence user pro-
grammed software should perform a complete configuration:
The AT91SAM9G45 features an External Bus Interface to interface to a wide range of external
memories and to any parallel peripheral.
• Boot on on-chip RC
• Enable the 32768 Hz oscillator
• Auto baudrate detection
• Downloads and runs an application from external storage media into internal SRAM
• Downloaded code size depends on embedded SRAM size
• Automatic detection of valid application
• Bootloader on a non-volatile memory
• SAM-BA Boot in case no valid program is detected in external NVM, supporting
• Boot on on-chip RC
• Boot with the default configuration for the Static Memory Controller, byte select mode, 16-bit
• Enable the 32768 Hz oscillator if best accuracy needed
• Program the PMC (main oscillator enable or bypass mode)
• Program and Start the PLL
• Reprogram the SMC setup, cycle, hold, mode timings registers for EBI CS0 to adapt them to
• Switch the main clock to the new value
• Integrates 4-ports DDR2/LPDDR controller that support:
data bus, Read/Write controlled by Chip Select, allows boot on 16-bit non-volatile memory.
the new clock
– SPI DataFlash/SerialFlash connected on NPCS0 of the SPI0
– SDCard
– NandFlash
– EEPROM connected on TWI0
– Serial communication on a DBGU
– USB Device HS Port
– 16-bit DDR2 memories
– 16-bit LPDDR memories
6438CS–ATARM–13-Oct-09

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