at91sam9g45 ATMEL Corporation, at91sam9g45 Datasheet - Page 36

no-image

at91sam9g45

Manufacturer Part Number
at91sam9g45
Description
At91 Arm Thumb-based Microcontrollers
Manufacturer
ATMEL Corporation
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
at91sam9g45-CU
Manufacturer:
ATMEL
Quantity:
1 000
Part Number:
at91sam9g45-CU
Manufacturer:
Atmel
Quantity:
31
Part Number:
at91sam9g45-CU
Manufacturer:
Atmel
Quantity:
10 000
Part Number:
at91sam9g45-CU
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Company:
Part Number:
at91sam9g45-CU
Quantity:
340
Part Number:
at91sam9g45-CU-999
Manufacturer:
Atmel
Quantity:
10 000
Part Number:
at91sam9g45B-CU
Manufacturer:
ON
Quantity:
1 200
Part Number:
at91sam9g45B-CU
Manufacturer:
Atmel
Quantity:
10 000
Part Number:
at91sam9g45B-CU-999
Manufacturer:
Atmel
Quantity:
10 000
Part Number:
at91sam9g45C-CU
Manufacturer:
ATMEL
Quantity:
1 200
Part Number:
at91sam9g45C-CU
Manufacturer:
Atmel
Quantity:
10 000
Part Number:
at91sam9g45C-CU
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
8.14
8.15
36
Debug Unit
Chip Identification
AT91SAM9G45
The AT91SAM9G45 Chip ID is defined in the Debug Unit Chip ID Register and Debug Unit Chip
ID Extension Register.
• One External Sources plus the Fast Interrupt signal
• 8-level Priority Controller
• Vectoring
• Protect Mode
• Fast Forcing
• Composed of two functions
• Two-pin UART
• Debug Communication Channel Support
• Chip ID: 0x819B05A2
• Ext ID: 0x00000004
• JTAG ID: 05B2_703F
• ARM926 TAP ID: 0x0792603F
– Drives the Normal Interrupt of the processor
– Handles priority of the interrupt sources 1 to 31
– Higher priority interrupts can be served during service of lower priority interrupt
– Optimizes Interrupt Service Routine Branch and Execution
– One 32-bit Vector Register per interrupt source
– Interrupt Vector Register reads the corresponding current Interrupt Vector
– Easy debugging by preventing automatic operations when protect modes are
– Permits redirecting any normal interrupt source on the Fast Interrupt of the
– Two-pin UART
– Debug Communication Channel (DCC) support
– Implemented features are 100% compatible with the standard Atmel USART
– Independent receiver and transmitter with a common programmable Baud Rate
– Even, Odd, Mark or Space Parity Generation
– Parity, Framing and Overrun Error Detection
– Automatic Echo, Local Loopback and Remote Loopback Channel Modes
– Support for two PDC channels with connection to receiver and transmitter
– Offers visibility of and interrupt trigger from COMMRX and COMMTX signals from
enabled
processor
Generator
the ARM Processor’s ICE Interface
6438CS–ATARM–13-Oct-09

Related parts for at91sam9g45