at91sam9g15-cu ATMEL Corporation, at91sam9g15-cu Datasheet - Page 11

• Manufacturer Part Number: at91sam9g15-cu
• Description: At91sam Arm-based Embedded Mpu
• Manufacturer: ATMEL Corporation

Table 4-3.
4.3
11052AS–ATARM–27-Jul-11
Ball
N4
R1
R4
R3
U3
U1
U2
U4
R5
U5
U6
R6
U7
R7
U8
R9
R8
U9
D3
D4
D2
D1
B3
C2
L3
P1
L4
T3
P4
T1
T2
T4
P5
T5
T6
T7
T8
P8
E4
E3
217-ball BGA Package Pinout
Power Rail
VDDIOP0
VDDIOP0
VDDIOP0
VDDIOP0
VDDIOP0
VDDIOP0
VDDIOP0
VDDIOP0
VDDIOP0
VDDIOP0
VDDIOP0
VDDIOP0
VDDIOP0
VDDIOP0
VDDIOP0
VDDIOP0
VDDIOP0
VDDIOP0
VDDIOP0
VDDIOP0
VDDIOP0
VDDIOP0
VDDIOP0
VDDIOP0
VDDIOP0
VDDIOP0
VDDIOP0
VDDIOP0
VDDIOP0
VDDIOP0
VDDIOP0
VDDIOP0
VDDANA
VDDANA
VDDANA
VDDANA
VDDANA
VDDANA
VDDANA
VDDANA
Pin Description BGA217
GPIO_CLK
GPIO_CLK
GPIO_CLK
GPIO_CLK
GPIO_ANA
GPIO_ANA
I/O Type
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
Signal
PA10
PA11
PA12
PA13
PA14
PA15
PA16
PA17
PA18
PA19
PA20
PA21
PA22
PA23
PA24
PA25
PA26
PA27
PA28
PA29
PA30
PA31
PA0
PA1
PA2
PA3
PA4
PA5
PA6
PA7
PA8
PA9
PB0
PB1
PB2
PB3
PB4
PB5
PB6
PB7
Primary
Dir
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
Signal
AD7
AD8
Alternate
Dir
I
I
SPI0_NPCS0
SPI0_SPCK
SPI0_MISO
SPI0_MOSI
MCI0_CDA
MCI0_DA0
MCI0_DA1
MCI0_DA2
MCI0_DA3
PIO Peripheral A
MCI0_CK
Signal
TWCK0
TCLK0
TCLK1
TCLK2
DRXD
TIOA0
TIOA1
TIOA2
TIOB0
TIOB1
TIOB2
TWD0
RXD0
RXD1
RXD2
DTXD
TXD0
RTS0
CTS0
SCK0
TXD1
TXD2
Dir
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
O
O
O
O
O
I
I
I
I
I
I
I
I
SPI1_NPCS1
SPI0_NPCS2
SPI0_NPCS1
SPI1_NPCS3
SPI1_NPCS0
SPI1_NPCS2
SPI0_NPCS3
SPI1_MISO
SPI1_MOSI
SPI1_SPCK
MCI1_CDA
MCI1_DA1
MCI1_DA2
MCI1_DA3
MCI1_DA0
PIO Peripheral B
MCI1_CK
Signal
TWCK2
TWD2
RTS2
CTS2
SCK2
TD
RD
RK
RF
TK
TF
Dir
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
O
O
O
O
O
O
O
O
I
I
PIO Peripheral C
Signal
SAM9G15
Dir
Signal, Dir, PU,
PIO, I, PU, ST
PIO, I, PU, ST
PIO, I, PU, ST
PIO, I, PU, ST
PIO, I, PU, ST
PIO, I, PU, ST
PIO, I, PU, ST
PIO, I, PU, ST
PIO, I, PU, ST
PIO, I, PU, ST
PIO, I, PU, ST
PIO, I, PU, ST
PIO, I, PU, ST
PIO, I, PU, ST
PIO, I, PU, ST
PIO, I, PU, ST
PIO, I, PU, ST
PIO, I, PU, ST
PIO, I, PU, ST
PIO, I, PU, ST
PIO, I, PU, ST
PIO, I, PU, ST
PIO, I, PU, ST
PIO, I, PU, ST
PIO, I, PU, ST
PIO, I, PU, ST
PIO, I, PU, ST
PIO, I, PU, ST
PIO, I, PU, ST
PIO, I, PU, ST
PIO, I, PU, ST
PIO, I, PU, ST
PIO, I, PU, ST
PIO, I, PU, ST
PIO, I, PU, ST
PIO, I, PU, ST
PIO, I, PU, ST
PIO, I, PU, ST
PIO, I, PU, ST
PIO, I, PU, ST
Reset State
PD, ST
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