at91sam9g15-cu ATMEL Corporation, at91sam9g15-cu Datasheet - Page 38

• Manufacturer Part Number: at91sam9g15-cu
• Description: At91sam Arm-based Embedded Mpu
• Manufacturer: ATMEL Corporation

38
SAM9G15
• Channel Buffering
• Channel Control
• Transfer Initiation
• Interrupt
– Gather support for extracting fields from a system memory area into a contiguous
– User enabled auto-reloading of source, destination and control registers from initially
– Auto-loading of source, destination and control registers from system memory at end
– Unaligned system address to data transfer width supported in hardware
– Picture-In-Picture Mode (on DMAC0 only)
– 16-word FIFO (64-word for channel 0 of DMAC0)
– Automatic packing/unpacking of data to fit FIFO width
– Programmable multiple transaction size for each channel
– Support for cleanly disabling a channel without data loss
– Suspend DMA operation
– Programmable DMA lock transfer support
– Support for Software handshaking interface. Memory mapped registers can be used
– Programmable Interrupt generation on DMA Transfer completion Block Transfer
transfer
programmed values at the end of a block transfer
of block transfer in block chaining mode
to control the flow of a DMA transfer in place of a hardware handshaking interface
completion, Single/Multiple transaction completion or Error condition
11052AS–ATARM–27-Jul-11