p89lpc932ba NXP Semiconductors, p89lpc932ba Datasheet - Page 17
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p89lpc932ba
Manufacturer Part Number
p89lpc932ba
Description
P89lpc932 8-bit Microcontroller With Accelerated Two-clock 80c51 Core 8 Kb Flash With 512-byte Data Eeprom And 768-byte Ram
Manufacturer
NXP Semiconductors
Datasheet
1.P89LPC932BA.pdf
(60 pages)
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Philips Semiconductors
8. Functional description
9397 750 12379
Product data
8.2.1 Clock definitions
8.2.2 CPU clock (OSCCLK)
8.2.3 Low speed oscillator option
8.2.4 Medium speed oscillator option
8.2.5 High speed oscillator option
8.1 Enhanced CPU
8.2 Clocks
Remark: Please refer to the P89LPC932 User’s Manual for a more detailed
functional description.
The P89LPC932 uses an enhanced 80C51 CPU which runs at 6 times the speed of
standard 80C51 devices. A machine cycle consists of two CPU clock cycles, and
most instructions execute in one or two machine cycles.
The P89LPC932 device has several internal clocks as defined below:
OSCCLK — Input to the DIVM clock divider. OSCCLK is selected from one of four
clock sources (see
(see
Note: f
CCLK — CPU clock; output of the clock divider. There are two CCLK cycles per
machine cycle, and most instructions are executed in one to two machine cycles (two
or four CCLK cycles).
RCCLK — The internal 7.373 MHz RC oscillator output.
PCLK — Clock for the various peripheral devices and is
The P89LPC932 provides several user-selectable oscillator options in generating the
CPU clock. This allows optimization for a range of needs from high precision to lowest
possible cost. These options are configured when the FLASH is programmed and
include an on-chip watchdog oscillator, an on-chip RC oscillator, an oscillator using
an external crystal, or an external clock source. The crystal oscillator can be
optimized for low, medium, or high frequency crystals covering a range from 20 kHz
to 12 MHz.
This option supports an external crystal in the range of 20 kHz to 100 kHz. Ceramic
resonators are also supported in this configuration.
This option supports an external crystal in the range of 100 kHz to 4 MHz. Ceramic
resonators are also supported in this configuration.
This option supports an external crystal in the range of 4 MHz to 12 MHz. Ceramic
resonators are also supported in this configuration.
Section 8.7 “CPU Clock (CCLK) modification: DIVM
OSC
is defined as the OSCCLK frequency.
Rev. 04 — 06 January 2004
Figure
8-bit microcontroller with accelerated two-clock 80C51 core
6) and can also be optionally divided to a slower frequency
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
CCLK
register”).
P89LPC932
2
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