p89lpc932ba NXP Semiconductors, p89lpc932ba Datasheet - Page 42

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p89lpc932ba

Manufacturer Part Number
p89lpc932ba
Description
P89lpc932 8-bit Microcontroller With Accelerated Two-clock 80c51 Core 8 Kb Flash With 512-byte Data Eeprom And 768-byte Ram
Manufacturer
NXP Semiconductors
Datasheet

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Product data
8.27.3 ISP and IAP capabilities of the P89LPC932
Flash organization:
sectors. Each sector can be further divided into 64-byte pages. In addition to sector
erase and page erase, a 64-byte page register is included which allows from
1 to 64 bytes of a given page to be programmed at the same time, substantially
reducing overall programming time. An In-Application Programming (IAP) interface is
provided to allow the end user’s application to erase and reprogram the user code
memory. In addition, erasing and reprogramming of user-programmable bytes
including UCFG1, the Boot Status Bit and the Boot Vector are supported. As shipped
from the factory, the upper 512 bytes of user code space contains a serial In-System
Programming (ISP) routine allowing for the device to be programmed in circuit
through the serial port.
Flash programming and erasing:
programming of the Flash memory that may be used. First, the Flash may be
programmed or erased in the end-user application by calling low-level routines
through a common entry point. Second, the on-chip ISP boot loader may be invoked.
This ISP boot loader will, in turn, call low-level routines through the same common
entry point that can be used by the end-user application. Third, the Flash may be
programmed or erased using the parallel method by using a commercially available
EPROM programmer which supports this device. This device does not provide for
direct verification of code memory contents. Instead, this device provides a 32-bit
CRC result on either a sector or the entire 8 kB of user code space.
Boot ROM:
low-level details are handled by code that is contained in a Boot ROM that is separate
from the Flash memory. A user program simply calls the common entry point in the
Boot ROM with appropriate parameters to accomplish the desired operation. The
Boot ROM include operations such as erase sector, erase page, program page, CRC,
program security bit, etc. The Boot ROM occupies the program memory space at the
top of the address space from FF00 to FEFF hex, thereby not conflicting with the user
program memory space.
Power-on reset code execution:
elements: the Boot Vector and the Boot Status Bit. Following reset, the P89LPC932
examines the contents of the Boot Status Bit. If the Boot Status Bit is set to zero,
power-up execution starts at location 0000H, which is the normal start address of the
user’s application code. When the Boot Status Bit is set to a value other than zero, the
contents of the Boot Vector is used as the high byte of the execution address and the
low byte is set to 00H. The factory default setting is 01EH and corresponds to the
address 1E00H for the default ISP boot loader. This boot loader is pre-programmed
at the factory into this address space and can be erased by the user. Users who
wish to use this loader should take precautions to avoid erasing the 1 kB
sector from 1C00H to 1FFFH. Instead, the page erase function can be used to
erase the eight 64-byte pages located from 1C00H to 1DFFH. A custom boot
loader can be written with the Boot Vector set to the custom boot loader, if desired.
Hardware activation of the boot loader:
forcing the device into ISP mode during a power-on sequence (see the P89LPC932
User’s Manual for specific information). This has the same effect as having a
non-zero status byte. This allows an application to be built that will normally execute
user code but can be manually forced into ISP operation. If the factory default setting
When the microcontroller programs its own Flash memory, all of the
Rev. 04 — 06 January 2004
8-bit microcontroller with accelerated two-clock 80C51 core
The P89LPC932 program memory consists of eight 1 kB
The P89LPC932 contains two special Flash
There are three methods of erasing or
The boot loader can also be executed by
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
P89LPC932
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