lpc3240 NXP Semiconductors, lpc3240 Datasheet - Page 55

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lpc3240

Manufacturer Part Number
lpc3240
Description
16/32-bit Arm Microcontrollers; Hardware ?oating-point Coprocessor, Usb On-the-go, And Emc Memory Interface
Manufacturer
NXP Semiconductors
Datasheet

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NXP Semiconductors
LPC3220_30_40_50_1
Preliminary data sheet
Fig 8.
Fig 9.
Fig 10. DDR read timing parameters
(1) The delay of the EMC_DQSm signal is determined by the DQS_DELAY settings. See LPC32x0 user manual, External Memory
DDR control timing parameters
DDR write timing parameters
Controller Chapter, section DDR DQS delay calibration for details on configuring this value.
delayed EMC_DQSm
EMC_DQM[1:0]
EMC_D[31:0],
EMC_D[31:0]
EMC_DQSm
EMC_DQSm
EMC_CLK
EMC_CLK
command
command
EMC control
(1)
and address
EMC_CLK
signals
READ
WRITE
t
d(AV);
t
WPRE
t
Rev. 01 — 6 February 2009
DQSS
t
d(V)ctrl
t
CK
t
RPRE
t
su(D)
t
valid
t
DQSL
DSS
t
t
su(Q)
h(A);
t
t
h(ctl)
CH
t
h(Q)
t
t
DQSH
DSH
t
d(DQS)
LPC3220/30/40/50
t
WPST
t
CL
16/32-bit ARM microcontrollers
002aae436
t
RPST
002aae437
© NXP B.V. 2009. All rights reserved.
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