z8f1621 ZiLOG Semiconductor, z8f1621 Datasheet - Page 111
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z8f1621
Manufacturer Part Number
z8f1621
Description
High Performance 8-bit Microcontrollers
Manufacturer
ZiLOG Semiconductor
Datasheet
1.Z8F1621.pdf
(297 pages)
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PS019921-0308
Watchdog Timer Reload Upper, High and Low Byte Registers
POR—Power-On Reset Indicator
If this bit is set to 1, a Power-On Reset event occurred. This bit is reset to 0 if a WDT time-
out or Stop Mode Recovery occurs. This bit is also reset to 0 when the register is read.
STOP—Stop Mode Recovery Indicator
If this bit is set to 1, a Stop Mode Recovery occurred. If the STOP and WDT bits are both
set to 1, the Stop Mode Recovery occurred due to a WDT time-out. If the STOP bit is 1
and the WDT bit is 0, the Stop Mode Recovery was not caused by a WDT time-out. This bit
is reset by a Power-On Reset or a WDT time-out that occurred while not in STOP mode.
Reading this register also resets this bit.
WDT—Watchdog Timer Time-Out Indicator
If this bit is set to 1, a WDT time-out occurred. A Power-On Reset resets this pin. A Stop
Mode Recovery from a change in an input pin also resets this bit. Reading this register
resets this bit.
EXT—External Reset Indicator
If this bit is set to 1, a Reset initiated by the external RESET pin occurred. A Power-On
Reset or a Stop Mode Recovery from a change in an input pin resets this bit. Reading this
register resets this bit.
Reserved
These bits are reserved and must be 0.
SM—STOP Mode Configuration Indicator
0 = Watchdog Timer and its internal RC oscillator will continue to operate in STOP Mode.
1 = Watchdog Timer and its internal RC oscillator will be disabled in STOP Mode.
The Watchdog Timer Reload Upper, High and Low Byte (WDTU, WDTH, WDTL) regis-
ters (see
that is loaded into the Watchdog Timer when a WDT instruction executes. The 24-bit
reload value is {WDTU[7:0], WDTH[7:0], WDTL[7:0]}. Writing to these registers sets
the desired Reload Value. Reading from these registers returns the current Watchdog
Timer count value.
Reset or Stop Mode Recovery Event
Power-On Reset
Reset using RESET pin assertion
Reset using Watchdog Timer time-out
Reset using the On-Chip Debugger (OCDCTL[1] set to 1) 1
Reset from STOP Mode using DBG Pin driven Low
Stop Mode Recovery using GPIO pin transition
Stop Mode Recovery using Watchdog Timer time-out
Table 49
on page 98 through
Table 51
on page 98) form the 24-bit reload value
Z8 Encore! XP
POR
1
0
0
1
0
0
Product Specification
STOP WDT
0
0
0
0
0
1
1
®
0
0
1
0
0
0
1
F64XX Series
Watchdog Timer
EXT
0
1
0
0
0
0
0
97
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