z8f1621 ZiLOG Semiconductor, z8f1621 Datasheet - Page 248

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z8f1621

Manufacturer Part Number
z8f1621
Description
High Performance 8-bit Microcontrollers
Manufacturer
ZiLOG Semiconductor
Datasheet

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PS019921-0308
(Output)
(Input)
(Output)
CTS
DE
TXD
UART Timing
Figure 55
Clear To Send input pin (CTS) is used for flow control. In this example, it is assumed that
the Driver Enable polarity has been configured to be Active Low and is represented here
by DE. The CTS to DE assertion delay (T1) assumes the UART Transmit Data register has
been loaded with data prior to CTS assertion.
Table 120. UART Timing with CTS
Parameter Abbreviation
T
T
T
1
2
3
T
1
and
CTS Fall to DE Assertion Delay
DE Assertion to TXD Falling Edge (Start)
Delay
End of Stop Bit(s) to DE Deassertion Delay
Table 120
T
2
Figure 55. UART Timing with CTS
Start
provide timing information for UART pins for the case where the
Bit 0
Bit 1
Z8 Encore! XP
Bit 7
2 * XIN period 2 * XIN period
1 Bit period
1 * XIN period 2 * XIN period
Minimum
Parity
Product Specification
Electrical Characteristics
Delay (ns)
Stop
®
Stop Bit(s)
End of
F64XX Series
+ 1 Bit period
1 Bit period +
1 * XIN period
Maximum
T
3
234

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