mc9s08dn60 Freescale Semiconductor, Inc, mc9s08dn60 Datasheet - Page 99
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mc9s08dn60
Manufacturer Part Number
mc9s08dn60
Description
Hcs08 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.MC9S08DN60.pdf
(354 pages)
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1
6.5.5.3
6.5.5.4
Note: Slew rate reset default values may differ between engineering samples and final production parts. Always initialize slew
Freescale Semiconductor
PTEPE[7:0]
PTESE[7:0]
Reset:
Reset:
PTESE1 has no effect on the input-only PTE1 pin.
Field
Field
7:0
7:0
rate control to the desired value to ensure correct operation.
W
W
R
R
PTEPE7
PTESE7
Internal Pull Enable for Port E Bits — Each of these control bits determines if the internal pull-up device is
enabled for the associated PTE pin. For port E pins that are configured as outputs, these bits have no effect and
the internal pull devices are disabled.
0 Internal pull-up device disabled for port E bit n.
1 Internal pull-up device enabled for port E bit n.
Output Slew Rate Enable for Port E Bits — Each of these control bits determines if the output slew rate control
is enabled for the associated PTE pin. For port E pins that are configured as inputs, these bits have no effect.
0 Output slew rate control disabled for port E bit n.
1 Output slew rate control enabled for port E bit n.
Port E Pull Enable Register (PTEPE)
0
Port E Slew Rate Enable Register (PTESE)
0
7
7
Pull-down devices only apply when using pin interrupt functions, when
corresponding edge select and pin select functions are configured.
PTEPE6
PTESE6
Figure 6-34. Internal Pull Enable for Port E Register (PTEPE)
Figure 6-35. Slew Rate Enable for Port E Register (PTESE)
0
0
6
6
Table 6-32. PTEPE Register Field Descriptions
Table 6-33. PTESE Register Field Descriptions
PTEPE5
PTESE5
MC9S08DN60 Series Data Sheet, Rev 2
0
0
5
5
PTEPE4
PTESE4
NOTE
0
0
4
4
Description
Description
PTEPE3
PTESE3
3
0
3
0
PTEPE2
PTESE2
Chapter 6 Parallel Input/Output Control
0
0
2
2
PTESE1
PTEPE1
0
0
1
1
1
PTEPE0
PTESE0
0
0
0
0
99
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